gdt problem
the_anomaly, Mon May 28 2007, 12:04PMOk so I’m trying to finish building my first sstc and I’ve come across a few problems. I’m basing my driver off Richie Burnett’s ‘small table top coil’. I changed it bit to build it with the components I have (replaced the transistors with UCC chips)
![]( <a class="e-url" href="http://nickhv.com/img/other/richies%20modded%20tl494%20driver.bmp" target="_blank"><img src='https://4hv.org/e107_images/generic/bbcode/link2.png' alt='Link2' title='Link2' class='img-rounded rounded bbcode bbcode-img' /></a> ){kind=link}
. Its fine up until I get to the gate driver transformer. I get a high pitch sound and the 10 ohm resistor in series with the GDT gets hot in seconds. Without the GDT connected to the UCC chips I get this waveform: UCC wave 
But when I connect the GDT the waveform I get out of the secondary is: GDT wave
And then several seconds later the resistor in series with the GDT is smoking. I can’t see anything I’m doing different to the rest of you guys but something isn’t right. Does anyone have any ideas? I’m sure the core is ferrite because it’s dark grey in color and was packaged in some white plastic that pulled apart.
Re: gdt problem
Sulaiman, Mon May 28 2007, 12:20PM
There are not enough primary turns on your GDT for the frequency that you're operating at.
the core is clearly saturating, you need at least three times as many turns.
Your drive waveform is also not 50% duty which will need to be adjusted but this is not the reson for the 'bad' waveshape.
Sulaiman, Mon May 28 2007, 12:20PM
There are not enough primary turns on your GDT for the frequency that you're operating at.
the core is clearly saturating, you need at least three times as many turns.
Your drive waveform is also not 50% duty which will need to be adjusted but this is not the reson for the 'bad' waveshape.
Re: gdt problem
Bennem, Mon May 28 2007, 12:27PM
I agree with Sulaiman,
plus you need a cap on the UCC output to your GDT primary.
Bennem, Mon May 28 2007, 12:27PM
I agree with Sulaiman,
plus you need a cap on the UCC output to your GDT primary.
Re: gdt problem
Marko, Mon May 28 2007, 12:57PM
Generally, your TL494 output connection is *wrong*.
Each output (pins 9 and 10) need to be connected to their own UCC with a pull up/down resistor.
This will give a symetric waveform with variable deadtime. But still, a DC block capacitor is required to fix little imperfections wich may cause saturation of the core.
Regarding your voltage feedback, I don't think it will work that way. You'l just have heavily unstable frequency.
And, why is the pin 3 of upper chip connected together with input?
Enable pins should be tied to Vcc if you are not using them.
Also, by using SG3525 you could simplify things further as you could directly drive mosfets with it's powerful output stage.
But still, I actually wouldn't recommend using a VCO at all.
Just take a look af final version of steve's SSTC5.
It will definitely save you a lot of trouble and possibly blown mosfets.
Just examine this, take look at pics, you'l surely be happy.
Marko, Mon May 28 2007, 12:57PM
Generally, your TL494 output connection is *wrong*.
Each output (pins 9 and 10) need to be connected to their own UCC with a pull up/down resistor.
This will give a symetric waveform with variable deadtime. But still, a DC block capacitor is required to fix little imperfections wich may cause saturation of the core.
Regarding your voltage feedback, I don't think it will work that way. You'l just have heavily unstable frequency.
And, why is the pin 3 of upper chip connected together with input?
Enable pins should be tied to Vcc if you are not using them.
Also, by using SG3525 you could simplify things further as you could directly drive mosfets with it's powerful output stage.
But still, I actually wouldn't recommend using a VCO at all.
Just take a look af final version of steve's SSTC5.
It will definitely save you a lot of trouble and possibly blown mosfets.
Just examine this, take look at pics, you'l surely be happy.
Re: gdt problem
ragnar, Mon May 28 2007, 02:12PM
Firkragg, how can you use a DC-blocking capacitor on the output of the TL494 if you're using a centre-tapped primary and pushing it from both ends (from the complementary outputs)... you can't, right?
The DC-blocking capacitor is only possible in half-bridge (etc) arrangements... This means my ferrite will eventually get stuffed, because in a particular TL494 circuit, I've used a centre-tapped primary. (makes it easier to keep both MOSFET sources grounded... no gate-driver transformer, etc)
Hmmm
ragnar, Mon May 28 2007, 02:12PM
Firkragg, how can you use a DC-blocking capacitor on the output of the TL494 if you're using a centre-tapped primary and pushing it from both ends (from the complementary outputs)... you can't, right?
The DC-blocking capacitor is only possible in half-bridge (etc) arrangements... This means my ferrite will eventually get stuffed, because in a particular TL494 circuit, I've used a centre-tapped primary. (makes it easier to keep both MOSFET sources grounded... no gate-driver transformer, etc)
Hmmm
Re: gdt problem
Marko, Mon May 28 2007, 04:41PM
Take a look at nick's schematic, it _is_ a halfbridge, of UCC's. Maybe I was unclear, the cap surely needs to be on UCC37322's output, in place of that 10 ohm resistor, nowhere near TL494.
I only mentioned that outputs of TL494 are wired wrongly on schematic since we want symetric waveform all the time.
Marko, Mon May 28 2007, 04:41PM
Firkragg, how can you use a DC-blocking capacitor on the output of the TL494 if you're using a centre-tapped primary and pushing it from both ends (from the complementary outputs)... you can't, right?
Take a look at nick's schematic, it _is_ a halfbridge, of UCC's. Maybe I was unclear, the cap surely needs to be on UCC37322's output, in place of that 10 ohm resistor, nowhere near TL494.
I only mentioned that outputs of TL494 are wired wrongly on schematic since we want symetric waveform all the time.
Re: gdt problem
Steve Conner, Mon May 28 2007, 05:05PM
I'd just like to add that if you can hear a high pitched sound, your frequency of operation is obviously way too low for a tabletop Tesla coil. So rather than putting more turns on your GDT, turn the frequency up.
Steve Conner, Mon May 28 2007, 05:05PM
I'd just like to add that if you can hear a high pitched sound, your frequency of operation is obviously way too low for a tabletop Tesla coil. So rather than putting more turns on your GDT, turn the frequency up.
Re: gdt problem
the_anomaly, Mon May 28 2007, 07:38PM
Ok I've put more turns on (30 still 1:1) but maybe I will unwind them and try increasing the frequency. I put some filter caps on the ucc chips which helped greatly improve the stability but at the start of the top and bottom of the wave there is what I think is called ringing (It looks like a giant voltage spike but when I zoom in it turns into a damped sine wave). I tried few different caps ~100n up to 110uf (and got rid of the resistor) but none of them seem to damp it at all.
If I connect it I won’t get it to swing the voltage below zero for the off time. As it is it goes +12volts down to -12 volts and then back again.
the_anomaly, Mon May 28 2007, 07:38PM
Ok I've put more turns on (30 still 1:1) but maybe I will unwind them and try increasing the frequency. I put some filter caps on the ucc chips which helped greatly improve the stability but at the start of the top and bottom of the wave there is what I think is called ringing (It looks like a giant voltage spike but when I zoom in it turns into a damped sine wave). I tried few different caps ~100n up to 110uf (and got rid of the resistor) but none of them seem to damp it at all.
wrote ...
And, why is the pin 3 of upper chip connected together with input?
And, why is the pin 3 of upper chip connected together with input?
If I connect it I won’t get it to swing the voltage below zero for the off time. As it is it goes +12volts down to -12 volts and then back again.
Re: gdt problem
Marko, Mon May 28 2007, 08:06PM
I apologize for one thing I missed out - if you are going to 'amplify' output of a TL494, you need both drivers to be noninverting and connected as I explained before.
If you are not using enable pins they should be on supply voltage. Leaving them floating is generally bad.
Your current design is, I would say, all-wrong with you having to manually set the duty cyce (as far as I see it's not even close to 50% on your scope shots), and the transformer needs exactly symetrical waveform on it's primary in order not to saturate.
Even after you fix that, you should put a few-uF capacitor on output of one UCC, in place of that 10ohm resistor.
The DC blocking capacitor ensures that no DC component gets into GDT primary and possibly causes it to 'walk' into saturation over a number of cycles (wich can happen even with tiny imbalance of duty cycle).
Transformer needs constant volt-seconds on it's primary - so if it is pinged witha square pulse on one side it must also get exactly the same pulse with reverse polarity to reset the core. Deadtime between these pulses can be, it's not important, but you should still keep it small to ensure zero current switching for the devices.
Regarding frequency, I'm pretty sure that you are safe by keeping it over 100 or so KHz.
30turns looks like a lot for SSTC frequencies, but I don't know your core dimensions.
I hope I helped somewhat...
Marko, Mon May 28 2007, 08:06PM
I apologize for one thing I missed out - if you are going to 'amplify' output of a TL494, you need both drivers to be noninverting and connected as I explained before.
If you are not using enable pins they should be on supply voltage. Leaving them floating is generally bad.
Your current design is, I would say, all-wrong with you having to manually set the duty cyce (as far as I see it's not even close to 50% on your scope shots), and the transformer needs exactly symetrical waveform on it's primary in order not to saturate.
Even after you fix that, you should put a few-uF capacitor on output of one UCC, in place of that 10ohm resistor.
The DC blocking capacitor ensures that no DC component gets into GDT primary and possibly causes it to 'walk' into saturation over a number of cycles (wich can happen even with tiny imbalance of duty cycle).
Transformer needs constant volt-seconds on it's primary - so if it is pinged witha square pulse on one side it must also get exactly the same pulse with reverse polarity to reset the core. Deadtime between these pulses can be, it's not important, but you should still keep it small to ensure zero current switching for the devices.
Regarding frequency, I'm pretty sure that you are safe by keeping it over 100 or so KHz.
30turns looks like a lot for SSTC frequencies, but I don't know your core dimensions.
I hope I helped somewhat...
Re: gdt problem
Danielle, Mon May 28 2007, 08:52PM
This isn't your problem yet but you probable want to synchronize the PWM with the interrupter to prevent turnning off in the muddle of a wave.
Danielle, Mon May 28 2007, 08:52PM
This isn't your problem yet but you probable want to synchronize the PWM with the interrupter to prevent turnning off in the muddle of a wave.
Re: gdt problem
the_anomaly, Tue May 29 2007, 08:01PM
Thanks for all the help so far, I think I’m beginning to understand how the whole thing works. But I don’t understand what’s happening with my pulse in the gdt. I send it a square wave and out the other end I get a deformed square wave. Just to experiment (and see if I *was* using the wrong type of core) I changed from using a ucc chip to a small npn transistor to drive a small inverter transformer and I get the same type of wave deformation (as before) on a smaller scale. My results were
On 10us/div:
high duty cycle
low duty cycle
The zero reference point for the tl494 output (top wave) is the bottom of third division counting from the top down (about where the wave’s bottom is).
The zero reference point for the transformer output (bottom wave) is the top of the first division (counting from the bottom up).
I noticed that when I was using ucc chips, by just connecting the gdt, the output wave of the ucc chips was deformed before it even reached the gdt. What causes this sort of thing to happen?
the_anomaly, Tue May 29 2007, 08:01PM
Thanks for all the help so far, I think I’m beginning to understand how the whole thing works. But I don’t understand what’s happening with my pulse in the gdt. I send it a square wave and out the other end I get a deformed square wave. Just to experiment (and see if I *was* using the wrong type of core) I changed from using a ucc chip to a small npn transistor to drive a small inverter transformer and I get the same type of wave deformation (as before) on a smaller scale. My results were
On 10us/div:
high duty cycle
low duty cycle
The zero reference point for the tl494 output (top wave) is the bottom of third division counting from the top down (about where the wave’s bottom is).
The zero reference point for the transformer output (bottom wave) is the top of the first division (counting from the bottom up).
I noticed that when I was using ucc chips, by just connecting the gdt, the output wave of the ucc chips was deformed before it even reached the gdt. What causes this sort of thing to happen?
Re: gdt problem
Marko, Tue May 29 2007, 08:23PM
Nick, you didn't listen...
Your waveform is ''deformed'' because you configured the TL494 to do it.
You tied both outputs together and you will never get symetric waveform unless you exactly adjust it, wich isn't very practical and destroys deadtime benefit you would have normally.
I don't know what else to tell you, except I wuld really recommend you to try out steve's design.
It's really a circuit you can hardly get wrong with and all you need to do is replace the TL494 with antenna and one buffer.
Once you get it working I assure you you will get on much easier with everything.
Marko, Tue May 29 2007, 08:23PM
Nick, you didn't listen...
Your waveform is ''deformed'' because you configured the TL494 to do it.
You tied both outputs together and you will never get symetric waveform unless you exactly adjust it, wich isn't very practical and destroys deadtime benefit you would have normally.
I don't know what else to tell you, except I wuld really recommend you to try out steve's design.
It's really a circuit you can hardly get wrong with and all you need to do is replace the TL494 with antenna and one buffer.
Once you get it working I assure you you will get on much easier with everything.
Re: gdt problem
Wolfram, Tue May 29 2007, 08:23PM
You are not supposed to vary the duty cycle, it should be 50% at all times.
For the third time, you need to connect it like Firkragg said farther up in the thread.
Your frequency is probably way too low, the usual Fres of tabletop SSTC secondaries is around 250-450KHz.
When you use the higher frequency, you can get away with less turns on the GDT, somewhere around 8-12 is usual, depends on many factors, experiment!
When it comes to UCC decoupling, use several caps. A 100nF ceramic and a 1-10µF tantalum very close to each UCC and a 100-1000µF electrolytic cap in common for both of them worked good for me.
For nice gate waveforms, gate resistors are essential.
Wolfram, Tue May 29 2007, 08:23PM
You are not supposed to vary the duty cycle, it should be 50% at all times.
For the third time, you need to connect it like Firkragg said farther up in the thread.
Your frequency is probably way too low, the usual Fres of tabletop SSTC secondaries is around 250-450KHz.
When you use the higher frequency, you can get away with less turns on the GDT, somewhere around 8-12 is usual, depends on many factors, experiment!
When it comes to UCC decoupling, use several caps. A 100nF ceramic and a 1-10µF tantalum very close to each UCC and a 100-1000µF electrolytic cap in common for both of them worked good for me.
For nice gate waveforms, gate resistors are essential.
Re: gdt problem
the_anomaly, Wed May 30 2007, 04:51PM
ok sorry about making you have to repeat it I dunno what’s been running through my mind..
So I separated each output and gave each its own pull down resistor and each its own ucc chip. Now how am I supposed to connect both outputs of the ucc chips? Do I just parallel them? By symmetric I think you mean there needs to be a perfect square wave in the primary in order for the secondary to have a square wave and keep the core from saturating right? I don't understand why it was necessary to separate both outputs. oh and why is it when I put a dc blocking cap on the output the wave drops below zero to about +6, -6 volts? I've seen steves design but I don't have any buffers and it seems a shame to waste all this time working with the tl494 and abandon it.
the_anomaly, Wed May 30 2007, 04:51PM
ok sorry about making you have to repeat it I dunno what’s been running through my mind..
So I separated each output and gave each its own pull down resistor and each its own ucc chip. Now how am I supposed to connect both outputs of the ucc chips? Do I just parallel them? By symmetric I think you mean there needs to be a perfect square wave in the primary in order for the secondary to have a square wave and keep the core from saturating right? I don't understand why it was necessary to separate both outputs. oh and why is it when I put a dc blocking cap on the output the wave drops below zero to about +6, -6 volts? I've seen steves design but I don't have any buffers and it seems a shame to waste all this time working with the tl494 and abandon it.
Re: gdt problem
Josh Johnson, Thu May 31 2007, 03:59AM
Hey Nick,
Make sure to check out these sites:
GDT Design
Guide to help you make sure your GDT is good.
Plasma02 Schematic
I think the link to the Plasmasonic schematic will help clear up things. It is a very successful similar design to Richies TL494 setup. Pay attention to the notes in the schematic. Very informative.
Your
high duty cycle
low duty cycle
links are broken.
Good luck,
JJ
Josh Johnson, Thu May 31 2007, 03:59AM
Hey Nick,
Make sure to check out these sites:
GDT Design
Guide to help you make sure your GDT is good.
Plasma02 Schematic
I think the link to the Plasmasonic schematic will help clear up things. It is a very successful similar design to Richies TL494 setup. Pay attention to the notes in the schematic. Very informative.
Your
high duty cycle
low duty cycle
links are broken.
Good luck,
JJ
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