A few PSoC 5LP Universal Driver questions
Patrick Konesky, Mon Mar 11 2019, 03:47AMHello, my name is Patrick and this is my first post here. I have been reading a fair amount of thread conversations and just generally lurking y'alls cool stuff.
So, I have been putting together a PSoC 5LP driver and using the Cypress software package for PSFB, phase shifted full bridge. It seems like the easiest to implement a ZVS based driver with it is to use the analog PSFB template but that requires external components to set a ramp derived from the resonant frequency, and seems that a second analog phase-shifter in series with the other to set a phase lead for IGBTs. The PSFB requires a impulse trigger with a frequency twice that which is desired at the output, so a rising or falling ETS to read the feedback transformer would accomplish this. The downside to this is really just needing to deal with analog components to accurately set a phase shift.
Similarly, I have been reading the PSFB datasheet and finding that it can take a value in the main.c file to digitally set the frequency for the PSFB's internal oscillator instead of the external oscillator described above. I believe I could accomplish this using a counter and depositing the value to PSFB_write_period() within the void setup and the main loop. The downside to this method seems like it would be synchronization with resonant input at the desired phase shift but i think a little low power testing and some math could yield a general equation to set the phase lead with software.
Anyway, the point of this thread was to see who else is working on a PSoC based UD and what kind of insight they have. Id like to avoid setting a constant frequency to drive this guy and I'm sure it's possible to do it analog but am really interesting in hearing possibilities integrating a digital system.
Thanks!
Peace
Re: A few PSoC 5LP Universal Driver questions
Patrick Konesky, Mon Mar 11 2019, 04:59PM
Patrick Konesky, Mon Mar 11 2019, 04:59PM
Re: A few PSoC 5LP Universal Driver questions
Hydron, Tue Mar 12 2019, 03:02PM
There has been quite a lot of work done by Netzpfuscher on the UD3 design (which I have up and running on the same dev board that you are using). See here for the girhub repo:
And a discussion thread with more info:
Hydron, Tue Mar 12 2019, 03:02PM
There has been quite a lot of work done by Netzpfuscher on the UD3 design (which I have up and running on the same dev board that you are using). See here for the girhub repo:
And a discussion thread with more info:
Re: A few PSoC 5LP Universal Driver questions
Patrick Konesky, Tue Mar 12 2019, 04:49PM
Oh heck yea, thanks for dropping that off. A lot of work indeed! I'll begin to sort through it over spring break and see what makes sense for my purposes.
Patrick Konesky, Tue Mar 12 2019, 04:49PM
Oh heck yea, thanks for dropping that off. A lot of work indeed! I'll begin to sort through it over spring break and see what makes sense for my purposes.
Re: A few PSoC 5LP Universal Driver questions
Patrick Konesky, Sun Mar 17 2019, 04:46AM
A cool note on the PSFB component in the Cypress software is that it posses a pulse skip like Kill feature. When an OCD takes place, instead of canceling the oscillator, the Kill option keeps the oscillator running in the background and only takes a pulse of signal away. Pretty neat o.
So I’m working on how to flip between halves of the bridge being phase shifted for that AltShift tek that someone described in their commercial drivers they were selling. I noticed that this would be just an output exchanging at a flip flopped clock rate. So two and gates feeding an or gate accomplishes the necessary components to accomplish that. I’ll drop a picture of what I mean in a second after I reduce its pixel size. I’m away from my driver and scope to verify this. so, if anyone wants to toss me a sanity check they’re more than welcome.
edit:
Patrick Konesky, Sun Mar 17 2019, 04:46AM
A cool note on the PSFB component in the Cypress software is that it posses a pulse skip like Kill feature. When an OCD takes place, instead of canceling the oscillator, the Kill option keeps the oscillator running in the background and only takes a pulse of signal away. Pretty neat o.
So I’m working on how to flip between halves of the bridge being phase shifted for that AltShift tek that someone described in their commercial drivers they were selling. I noticed that this would be just an output exchanging at a flip flopped clock rate. So two and gates feeding an or gate accomplishes the necessary components to accomplish that. I’ll drop a picture of what I mean in a second after I reduce its pixel size. I’m away from my driver and scope to verify this. so, if anyone wants to toss me a sanity check they’re more than welcome.
edit:
Re: A few PSoC 5LP Universal Driver questions
Patrick Konesky, Wed Apr 03 2019, 02:26AM
For this next pictured part i excluded the altswitch for simplicity, however i think testing revealed it worked but logic was better placed at the main output and not the delay output.
What i have here is an attempt to create an analog/digital version of a PSoC 5lp DRSSTC. I havent tested it yet, because although it is essentially organized like a UD2.x type of driver, it is by heart a digital device. So, i'm not deathly positive it will begin to oscillate without some sort of initial pulse to trigger an oscillation, which would then be read by the feedback transformer. Can anyone confirm one way or the other whether it could begin oscillating? Without a pulse, I do have the initial conditions of the PSFB component's outputs. I assume EPWM1A and EPWM2A will be initially open when the component turns on, which would hit the high impedance primary and possibly trigger an oscillation. The oscillation should be caught by the feedback current transformer and limited by the OCD. I am pretty sure the FB transformer would shoot high and generate my initial start of frame.
The front end left is supposed to be a potentiometer for phase lead control to allow for zvs. The capacitor, comparator, and current source (IDAC8) are all necessary components to accomplish analog phase shift. Read up in the link below. Then the middle PSFB allows for QCW, audio modulation, or fiber interrupt, plus some adjustable dead time.
Here for reference, a lot of what i'm using is coming out of this tutorial for phase shifted bridge devices. I'm using the analog phase shift method mentioned in the pdf. Ill also note that the PSoC work done on UD3, which was shared a few posts up is a bit too involved for me to understand what is happening. After downloading, a bunch of pieces are apparently missing. So, im going from scratch here. Ps if i come across as inexperienced it's because i am. Thanks
*
Patrick Konesky, Wed Apr 03 2019, 02:26AM
For this next pictured part i excluded the altswitch for simplicity, however i think testing revealed it worked but logic was better placed at the main output and not the delay output.
What i have here is an attempt to create an analog/digital version of a PSoC 5lp DRSSTC. I havent tested it yet, because although it is essentially organized like a UD2.x type of driver, it is by heart a digital device. So, i'm not deathly positive it will begin to oscillate without some sort of initial pulse to trigger an oscillation, which would then be read by the feedback transformer. Can anyone confirm one way or the other whether it could begin oscillating? Without a pulse, I do have the initial conditions of the PSFB component's outputs. I assume EPWM1A and EPWM2A will be initially open when the component turns on, which would hit the high impedance primary and possibly trigger an oscillation. The oscillation should be caught by the feedback current transformer and limited by the OCD. I am pretty sure the FB transformer would shoot high and generate my initial start of frame.
The front end left is supposed to be a potentiometer for phase lead control to allow for zvs. The capacitor, comparator, and current source (IDAC8) are all necessary components to accomplish analog phase shift. Read up in the link below. Then the middle PSFB allows for QCW, audio modulation, or fiber interrupt, plus some adjustable dead time.
Here for reference, a lot of what i'm using is coming out of this tutorial for phase shifted bridge devices. I'm using the analog phase shift method mentioned in the pdf. Ill also note that the PSoC work done on UD3, which was shared a few posts up is a bit too involved for me to understand what is happening. After downloading, a bunch of pieces are apparently missing. So, im going from scratch here. Ps if i come across as inexperienced it's because i am. Thanks
*
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