Re: DRSSTC design guide
Graham Armitage, Fri Feb 13 2015, 12:59PM

Wow - this is fantastic. Quite a project you have taken on. Having all this intel in one place will be invaluable. While your knowledge far exceeds mine, I would be happy to proof-read and provide feedback. Were you thinking of adding sections for Secondary Coil and Top-Load - size ratios, wire guide, materials etc. ?

Re: DRSSTC design guide
Mads Barnkob, Fri Feb 13 2015, 07:20PM


This is not just my knowledge, but also the knowledge of the community, with some explanation to the best practises from manufacturers application notes and research papers :)

I added secondary and topload chapters, cut out the PFC chapter to be its own.

Even just proof reading would be very helpful, as English is my 2nd language there is bound to be wrong grammatical written, and weird sentence constructions etc :)

Re: DRSSTC design guide
Mads Barnkob, Mon Feb 23 2015, 12:45PM

First post updated.

Chapter 4 about DC bus capacitors is finished and ready for review :)

EDIT: password protection is now removed, forgot about it.

Re: DRSSTC design guide
Sigurthr, Tue Feb 24 2015, 01:27AM

You should put in about the pulse width, tank voltage rating, and switch current peak ratings as well (all three are mathematically related). This is a subject not well covered in most resources and a major stumbling point I ran into a while back. I eventually wrote up a simple C++ calculator program to do the math for me, which has proven indispensable when roughing out design parameters. (I can link it if requested, but don't want to hijack your thread).

The short of it is if you choose too low of a voltage or current rating you'll severely limit the maximum pulse width to the point that you cripple your system.

Re: DRSSTC design guide
Uspring, Tue Feb 24 2015, 10:06AM

A very nice writeup
In the part about IGBTs you calculate the duty cycle by dividing burst length by burst period. Is this correct, since the IGBT is only on during half the RF period?

Re: DRSSTC design guide
Mads Barnkob, Tue Feb 24 2015, 10:26AM


It is not easy writing a guide for new coilers to explain in details how to make some choices, when most of the design have to be thought about before starting :) I might have to add a "Initial design thoughts" chapter, most people should have an idea of the size of coil they want to build and thus some ball park figures could be listed.

My plan was originally to explain these things in IGBT and MMC chapters as separate items, but not more separate than they are interlinked and one of the chapters would have to carry the weight and the other just reference to it, that is what I have done so far in the published chapters.


There are many uncertainties in using the hard switching data from the manufacturers and converting it to soft switching data, I have mostly used assumptions like a sinus wave has less than half the area of a square wave. Always keeping a head room so we do overengineer, it has a touch of practical experience put in, because if I really derated to the exact wave forms the result is ridiculously high and unrealistic switching speeds.

Maybe I do not mention this clear enough in the start of the chapter?

Re: DRSSTC design guide
Wolfram, Tue Feb 24 2015, 12:27PM

Excellent initiative, finally all the information on DRSSTC construction is collected in one place.

I'm reading through it at the moment, and I'll write comments here as I go along.

For the busbar chapter, where you talk about switching spikes, I don't fully agree with your formula. The formula you give will give you the AC voltage ripple on the bus caused by the inductance, but the switching spikes can be much worse than this. The switching spikes are given by the same formula V = L*dI/dt, but with dI/dt given by the IGBT switching time and the conducted current at the switching instant. The conducted current at the switching instant is given by Ipk*sin(switching phase angle). I'm not entirely sure if there are other mechanisms at play as well, but I think this is the major one.

It could also be good to mention potential losses from eddy currents induced into materials near the primary and primary wiring.

This is hard to find good information about, but copper tubing is normally phosphor deoxidized, so it has significantly lower conductivity than pure copper.

Phosphorus is the most commonly used deoxidant for copper but does have a deleterious effect
on the conductivity of the copper which will be around 92% IACS at a phosphorus content of
0.015%, reducing to about 78% at 0.05%.

Luckily, when used for high frequency stuff, the skin depth increases with lower conductivity, so the problem is not as bad as it first seems.

Excellent point about the switching losses being mostly uncorrelated with switching times.

Do you have a diagram of the internal circuit of the IGBT? It could be useful since you talk about the internal MOSFET, which is not explained elsewhere.

I really like the discussion on IGBT switching speed, some very good points on a topic where there otherwise is a lot of confusion.

Assuming that switching losses will decrease with increasing gate voltage is maybe not realistic.

I'll have a look through the rest later, but generally there's not much to criticise, it's very solid work and well explained.

Re: DRSSTC design guide
Sigurthr, Wed Feb 25 2015, 01:05AM

I'm reading through your guide so far, Mads, looks great. Might I recommend you change "Vripple" to "Vtransient" on the BusBar page to avoid confusing inexperienced readers?

Re: DRSSTC design guide
Mads Barnkob, Wed Feb 25 2015, 09:02AM


The 440A/us used in the switching transient calculation is derived from a CM300 switching 1000A at 100kHz. That is the current it is conducting at the start of the switch off time. It is however too high as I have not yet changed this example along with the changes I made to the IGBT chapter with assumed hard switching current at soft switching turn-off.

Proximity issues with metal and closed loops near the primary is a important subject that I had forgotten to include :)

Interesting about pure copper vs. treated copper. I will see what I can find and how much the difference is at the frequencies we work at. It could be it is just worth mentioning, but the effect is so little that its not worth worrying about.

I will add a internal model of the IGBT, I was thinking about it once I started mentioning the abstract internal parts of the IGBT, but got away from it in the heat of battle.

Higher gate voltage might only help on switching losses if we get to the point of raising the maximum limit of conducted current vs rating. I would assume that a higher voltage would make hole injection / recombination faster from the higher potential difference, but I am not completely sure on this.

Thanks for the kind words and some good points.



Thank you and I will change it to avoid confusion :)

Re: DRSSTC design guide
Wolfram, Tue Mar 03 2015, 10:53AM

Interesting about pure copper vs. treated copper. I will see what I can find and how much the difference is at the frequencies we work at. It could be it is just worth mentioning, but the effect is so little that its not worth worrying about.

True. The real life difference is quite minor. For my induction heating experiments I was looking for copper tubing with higher conductivity, but this turns out to be almost impossible to get, so there is no easy way to avoid this minor problem either.

In the DC bus capacitor chapter, you write "Voltage sharing between the two capacitors depends on their mutual ESR and ESL values." I would say that static voltage sharing only depends on the relative leakage currents of the capacitors. Voltage sharing when current is flowing also depends on the ratio of the capacitances. The voltage appearing across each capacitor in the dynamic case will also depend somewhat on ESR and ESL, but these parameters are more tightly matched between capacitors.

When the capacitance is large, it can sometimes be an advantage to have separate resistors for bleeding and voltage sharing, to minimize dissipation while still having a fast discharge time when the coil is powered down. The discharge resistor can also serve as a precharge resistor if you use a relay to switch it between the two different functions.

It's good that you include considerations about the RMS current rating of the capacitor, this is often overlooked.

A single phase active PFC can be placed after a three phase rectifier, and this will result in excellent power factor (theoretically up to 0.95 IIRC), as well as full compatibility with single phase input. I was researching this for a car charger project, and I was surprised at how good this solution was.

Do you know if anybody has tried RC snubbers in DRSSTCs? In other converters, I've had good success with these. By just adding capacitance across the bus, you're effectively lowering the characteristic impedance (and resonance frequency) of the bus, effectively making the stray resistance larger in comparison to get the required damping. Adding intentional resistance will often result in the same goal with much less capacitance.

Excellent stuff in general, and a lot of information I've not seen elsewhere. Looking forward to the next chapter.

Re: DRSSTC design guide
Mads Barnkob, Wed Mar 04 2015, 09:01PM


That sentence was quite contradictory to what I write just below about balancing resistors, so I changed it to only be about leakage current.

The R in RC snubbers is there to dampen the ringing, thus lowering the overall power loss in the capacitor, it is not really a big problem with our short average duty cycle. It would also have to be a carefully selected low inductance resistor, else we would risk just adding the inductance that we were fighting against in the first place. This is however properly only a problem with low power inverters, inductance of a resistor should not pose a problem in a huge bridge construction :)

The next chapter is ready, it is not that very long. It is about sizing the snubber capacitor according to bridge inductance or rules of thumb on selecting against primary peak current.:

Re: DRSSTC design guide
Mads Barnkob, Tue Jun 16 2015, 08:02AM

I added a FAQ to the design guide and so far it covers a selection of generic questions about skills, tools, size, cost and where to source parts:

If you have a good question/answer to add to the FAQ, feel free to add it here.

Re: DRSSTC design guide
kilovolt, Tue Jun 16 2015, 09:24AM

Very nice work, Mad, thanks for your effort.
Just a detail: I don't think the CM600 IGBT-modules are cheaper than the CM300, are they?

Best regards
kilovolt

Re: DRSSTC design guide
Mads Barnkob, Tue Jun 16 2015, 11:26AM


This is based entirely on my own purchases, I got a good deal on the CM600s and properly standard price on the CM300s, I added a little paragraph about it, it should only be an example and not a valuation list :) Always fight for those price knock-offs!

Re: DRSSTC design guide
kilovolt, Tue Jun 16 2015, 02:32PM

Ah okay, sorry, that makes sense! Hope you don't mind.

Best regards
kilovolt

Re: DRSSTC design guide
Mads Barnkob, Tue Jul 05 2016, 08:42AM

Chapters Secondary coil (in review) and Topload (in review) are now in review and I welcome all feedback, criticism and correction of any mistakes, errors or mistyping I have made :)

Re: DRSSTC design guide
nzoomed, Tue Jul 05 2016, 09:30PM

Thanks for the update!
This has been a valuable source of information for new coil builders like me :)

Re: DRSSTC design guide
Uspring, Thu Jul 07 2016, 11:55AM

Mads, thank you for collecting all this useful information. Some comments:

The Qsec = 1/k rule maximises the power transfer to the secondary for a given primary current in a steady state situation. Deviations from this rule will lead to larger primary currents as power is fed from the bridge into the primary. In other words, arc loading will have less effect on limiting the primary current.
This situation is roughly similar to either a low coupling or bad tuning.

This has an effect on the choice of the primary tanks Z. Generally one would choose a high Z tank for a bridge with high voltage (e.g. full bridge) and low current capabilities and a low Z tank for the opposite. Low Z tanks are generally preferable, since they need less cycles to ramp up and the number of primary turns is lower, thus reducing resistance losses. The drawback of a low Z tank is, that the current limit of the bridge will be reached sooner unless it is limited by arc loading. This is where the proper choice of Qsec comes in. It will keep the current lower and allows for a lower Z primary.

In the table 2 listing of the pros and cons of high and low coupling, I think, that tuning is less critical with higher coupling. The poles, where the coils are run, are spread further apart and are less sensitive to the tuning.

Re: DRSSTC design guide
Mads Barnkob, Wed Dec 12 2018, 12:17PM

It has been a very long time under way with the next chapter to go in review and it is the widely sought for: MMC design and calculations

You can read the article at: and to see it, the password is "test".

The reason for the password is to avoid google indexing and random visitors reading it before it has been reviewed by people with experience in the field.

This is where I need your help, there is most likely some spelling errors, bad sentences, does-not-make-any-sense chapters or calculations errors. Please reply to this thread about such findings for a discussion about it.

Re: DRSSTC design guide
Mads Barnkob, Thu Feb 07 2019, 08:19PM

It only took me a mere 4 years from I first started this article about the MMC until it is now done for public released :)

Not that it took me 4 full years to write on it, but it has been a on/off gathering of information and then finally making a writeup on it.

I hope this will help many builders understand MMC design better: