First SSTC design - Need some critique

DerStrom8, Wed Jun 25 2014, 08:45PM

NOTE: After working more on this project, I have decided to build a DRSSTC, rather than a standard SSTC as I originally planned. Many of my earlier posts no longer apply.

Hi folks,

I joined some time ago but dropped off the map for a bit. Now I'm back for a little assistance.

I recently got around to starting my own DRSSTC design, though to be honest I have no idea what I'm doing--I'm learning as I go. I have drawn out a basic circuit utilizing the TC4420/9 MOSFET drivers (one non-inverting, and one inverting) and a full H-bridge to drive the primary. A 1:50 transformer on the secondary passes a feedback signal through some cleanup circuitry (two Schmitt-trigger inverters) back into the 4420/9.

I have little no doubt there is a fair amount that I missed, or that is calculated incorrectly, but I figured if anyone could look it over and critique it, it would be you folks.

The circuit is only in the design stage, so a lot of the part numbers (FETs, especially) are not the actual components I will be using. I only used them in the circuit to get the simulation to work, since PROTEUS did not have all of the components I planned to use. So I guess just consider them symbolically and don't pay much attention to the actual part numbers.

Any help would be greatly appreciated. As I said, this is entirely new to me and I am continuously trying to learn. Let me know if you would also like the Proteus design files for simulation.

Thanks folks!
Regards,
Matt

Link2
Re: First SSTC design - Need some critique
Sigurthr, Thu Jun 26 2014, 12:43AM

Your high side fets are lacking a return current path for the gate drive signal. When the low side left fet is off there's no connection between the high side left Source and ground except through the primary and the low side right fet. Abandon the center tapped GDT and run a standard pentafiliar 1:1:1:1:1 GDT.

I'm not sure what you're doing with TR1 and TR2, but you left out the actual TC primary (unless one of those is meant to be coreless). Just use a single current transformer for feedback on the primary circuit, and don't ground any side of the primary circuit. What you have there looks more like you're trying to impedance match the inverter to the load, but that's only needed when running an inverter away from resonance, which you won't be doing.
Re: First SSTC design - Need some critique
DerStrom8, Thu Jun 26 2014, 01:35AM

Sigurthr wrote ...

Your high side fets are lacking a return current path for the gate drive signal. When the low side left fet is off there's no connection between the high side left Source and ground except through the primary and the low side right fet. Abandon the center tapped GDT and run a standard pentafiliar 1:1:1:1:1 GDT.

I'm not sure what you're doing with TR1 and TR2, but you left out the actual TC primary (unless one of those is meant to be coreless). Just use a single current transformer for feedback on the primary circuit, and don't ground any side of the primary circuit. What you have there looks more like you're trying to impedance match the inverter to the load, but that's only needed when running an inverter away from resonance, which you won't be doing.

Hi Sigurthr, thanks for the response.

I just realized I posted the wrong schematic. I've re-attached it, this time with the correct one.

TR1, as shown in the notes, is the primary/secondary. It should be coreless but I am not sure how to create coreless transformers for use in Proteus. I should have mentioned that in my original post. I am using a cored transformer just for the sake of simulation, and it does not reflect the actual circuit I will be using.

TR2 is the feedback transformer, which consists of 1 turn of the secondary and 50 turns going to the feedback cleanup circuitry.

I'm not sure what you're referring to when you say there's no return path for the gate drive signal. The GDT is grounded on the center tap, and the "bottom" of the H-bridge is also grounded. Was thinking that would serve as the return? When the left FET is off, then so is the low-side right FET, and the high-side right and low-side left FETs are on, feeding current through the Primary.

That's a good idea using the 1:1:1:1:1 though. I am assuming that is one winding for the TC4420/9, and one for each FET, am I correct?

Much obliged!
Matt

Link2
Re: First SSTC design - Need some critique
Sigurthr, Thu Jun 26 2014, 04:37AM

Yep, in pentafiliar one is for the primary, and four secondaries - one for each fet. This balances inductances and interwinding capacitances evenly.

The Gate-Source current of Q1 has to flow through the primary and then through DS junction of Q3 in order to return to the grounded center tap of the GDT. The same goes for Q4 and Q2. The problem is that this means that Q1 cannot turn on until Q3 has turned on, and the time Q3 spends in the linear state causes Q1 to spend an even longer time in the linear state. Not to mention the additional impedances presented to the gate drive current from having to flow through the primary which will likely greatly distort the gate signals. The result is instead of switching on as Q1/Q3 then Q2/Q4 you get Q3 then Q1 then Q2 then Q4. This greatly magnifies losses and presents a huge cross conduction hazard.

Also, you need a DC blocking capacitor on the primary of the GDT or else the GDT will appear as a short to the gate drive chips, blowing them up.

My instinct says that grounding the center tap of the GDT also causes you to present the full voltage differential between the positive rail of the Bus and ground to the Gate-Source junction, which will surely destroy the fets. It is late and I'm getting a bit fuzzy doing the simulation of this running in my head so take this last part with a grain of salt, but it doesn't look viable to me.
Re: First SSTC design - Need some critique
GrantX, Thu Jun 26 2014, 06:28AM

Sigurthr wrote ...

Yep, in pentafiliar one is for the primary, and four secondaries - one for each fet. This balances inductances and interwinding capacitances evenly.

My instinct says that grounding the center tap of the GDT also causes you to present the full voltage differential between the positive rail of the Bus and ground to the Gate-Source junction, which will surely destroy the fets. It is late and I'm getting a bit fuzzy doing the simulation of this running in my head so take this last part with a grain of salt, but it doesn't look viable to me.

I believe this is correct. The voltage you need to apply to the gates is relative to the SOURCE of the MOSFET. If the inverter is running off rectified 230V then the source of the high side transistors will be way over a hundred volts away from ground - so your grounded GDT will cause the gates to be annihilated instantly (and a lot of fault current will flow through the GDT and dead transistors - flames and booms). With isolated GDT windings, you connect the "bottom" of the coil (remembering correct phasing) directly to the source pin of the transistor that winding is driving. Then the "top" of that coil connects to the gate through the appropriate-sized gate resistor. Now the gate voltage is relative to the source of the FET - even if it's floating at several hundred volts the gate will only see the +/- 12-20 volt (whatever you choose) produced by the GDT. It's a good idea to use wire with decent insulation in your GDT, since it will be experiencing a couple of hundred volts. Its also a good idea to use "back to back" zeners across the gate and source pins to protect the gates from any unwanted spikes.

At least, that's what I'm seeing right now, if I'm wrong hopefully someone will point it out :)
Re: First SSTC design - Need some critique
Dr. Dark Current, Thu Jun 26 2014, 11:53AM

Hello, I'm afraid you still don't understand basics of electronics (there are really a lot of flaws in your circuit), I don't mean this in an offensive way but I think you should really follow a tried design for your first coil, like the Mini SSTC by Steve Ward.
Re: First SSTC design - Need some critique
DerStrom8, Thu Jun 26 2014, 12:55PM

Hi Everyone,

This is a lot of great feedback, thank you very much! It looks like I'll definitely have to re-think a lot of my circuit, so I'll keep this in mind when redrawing it.

I'll post back when I have something more.

@Dr. Dark Current--
The point of this project is not simply to build a SSTC. It's to learn how to design one. The design process is the most important part, so simply taking someone else's design really doesn't interest me. And for the record, I understand the basics of electronics, but SSTCs have a lot going on at once and my brain often can't keep up :p

Thanks for the information guys!
Re: First SSTC design - Need some critique
Dr. Dark Current, Thu Jun 26 2014, 04:32PM

I think the best way to get started is to build a proven design and then learn from it. I'd say this is the quickiest way to learn and then you'll be able to design a much better circuit.

But anyway:
-Pulling the gate drivers' inputs low or high during OFF-time is wrong, you must make sure that both drivers outputs are LOW or both HIGH during the OFF-time. Use the ENABLE pins of G-drivers or NAND gates.

-The GDT connection is horribly wrong. Just look at any other SSTC design, they all use similar connection of GDT secondaries.

-The GDT should have a 1:1 turns ratio. Wind it by insulated wires twisted together (eg. wires from an UTP cable) to form a "stranded wire". This way you'll get the lowest leakage inductance.

-Connect a 1-10uF ceramic/film cap in series with GDT primary to block DC voltage.

-Remove the resistor on CT output and replace it with a ~10nF capacitor to block DC voltage. The zener diode has a too high capacitance and it will increase your loop delay; use two 1N4148 diodes to clamp the CT output to the zener diode (to decrease capacitances).

-Gate driver decoupling caps are not drawn but I suppose you'll use them.

-The bridge is missing its decoupling capacitor as well.

-If the circuit is to be used as an DRSSTC, a primary current feedback is a much better option than secondary base current feedback.
Re: First SSTC design - Need some critique
DerStrom8, Thu Jun 26 2014, 05:09PM

Excellent comments, Dr. Dark Current, thank you. This is why I came here--for replies like yours!

Dr. Dark Current wrote ...

I think the best way to get started is to build a proven design and then learn from it. I'd say this is the quickiest way to learn and then you'll be able to design a much better circuit.

The other issue I didn't mention was that I am limited for parts, and do not have much cash to spend on this project. The idea was to design a SSTC (still not sure if I want to go for a DRSSTC or not) that your average hobbyist with little cash can build. I realize it may not be this simple, but that was the hope, anyway.

Dr. Dark Current wrote ...
But anyway:
-Pulling the gate drivers' inputs low or high during OFF-time is wrong, you must make sure that both drivers outputs are LOW or both HIGH during the OFF-time. Use the ENABLE pins of G-drivers or NAND gates.

Okay, that makes sense. I am used to needing pull-up/pull-down resistors and did not realize they would not work in this case. The TC4420/9 do not have enable pins. Also, since one driver is inverting and one non-inverting, I thought they were always supposed to be opposite of each other, thus creating the +/- 5V oscillation on the primary of the GDT. So you're saying they should both be on or both be off when the interrupter is low? I guess I don't really see the logic in this.

Dr. Dark Current wrote ...
-The GDT connection is horribly wrong. Just look at any other SSTC design, they all use similar connection of GDT secondaries.

Yes, that has been pointed out to me and quite honestly I'm not sure what I was thinking. I don't know why I used a grounded center tap, and I can see how it's horribly wrong =P

I have opted for the 1:1:1:1:1 transformer, as was suggested earlier. Unfortunately Proteus does not seem to have a model for this, so may have to start drawing it by hand and forgetting about the simulations. The first and third secondaries of the GDT will be in phase with the input, and the second and fourth secondaries will be out of phase. The first will be connected to the gate and source of the left high-side MOSFET, the second is connected to the right high-side MOSFET, the third will be connected to the right low-side MOSFET, and the fourth will be connected to the left low-side MOSFET. Does this sound right? I will be sketching it up eventually, and I will see about posting it again.

Dr. Dark Current wrote ...
-The GDT should have a 1:1 turns ratio. Wind it by insulated wires twisted together (eg. wires from an UTP cable) to form a "stranded wire". This way you'll get the lowest leakage inductance.

Okay, good. That's what I was planning on, so it's good to know I had *something* right (except for the turns ratio)!

Dr. Dark Current wrote ...
-Connect a 1-10uF ceramic/film cap in series with GDT primary to block DC voltage.

Noted and added!

Dr. Dark Current wrote ...
-Remove the resistor on CT output and replace it with a ~10nF capacitor to block DC voltage. The zener diode has a too high capacitance and it will increase your loop delay; use two 1N4148 diodes to clamp the CT output to the zener diode (to decrease capacitances).

I originally had a 100nF capacitor connected to the CT output, I'm not sure what happened to it. I must have deleted it when I moved things around and forgot to put it back in. Would 100nF have been okay, or should it be closer to the 10nF you recommended? Someone also suggested I simply get rid of the zener and use a shottkey, or even simpler, two 4148s to clamp the output to the 5V rail. What are your thoughts on this?

Dr. Dark Current wrote ...
-Gate driver decoupling caps are not drawn but I suppose you'll use them.

Good point, and they have been noted.

Dr. Dark Current wrote ...
-The bridge is missing its decoupling capacitor as well.

Noted.

Dr. Dark Current wrote ...
-If the circuit is to be used as an DRSSTC, a primary current feedback is a much better option than secondary base current feedback.

I had not thought of that until someone suggested it earlier. Now, correct me if I'm wrong, but a primary feedback signal is produced by putting a transformer in series with the primary, am I correct? And then I will need to rectify it and process it so that it passes a square wave back into the drivers?

Thanks again everyone for the great information. It certainly helps!

Cheers,
Matt
Re: First SSTC design - Need some critique
Dr. Dark Current, Thu Jun 26 2014, 05:33PM

wrote ...

So you're saying they should both be on or both be off when the interrupter is low? I guess I don't really see the logic in this.
When the interrupter is disabled, there should be no voltage on the GDT primary. As you pointed out, the drivers by itself are always at opposite logic levels when the inputs are connected, so in this configuration they are unable to turn off the GDT.
Also, you did want to power the gate drivers from 5 volts? NO, use 12 or 15 volts.

wrote ...

Would 100nF have been okay, or should it be closer to the 10nF you recommended? Someone also suggested I simply get rid of the zener and use a shottkey, or even simpler, two 4148s to clamp the output to the 5V rail. What are your thoughts on this?
I would use 10 nF but I guess it doesn't matter much. The 10 nF one will quicker block the DC voltage.
In this application, you can clamp the CT output to the 5V rail by two 1N4148 diodes. The current here is small. If the current would be larger, you would need to make sure the voltage of the 5V rail does not increase because of the additional rectified "supply current"; in this case it's best to clamp the input to the zener diode instead of the 5V supply.

wrote ...

Now, correct me if I'm wrong, but a primary feedback signal is produced by putting a transformer in series with the primary, am I correct? And then I will need to rectify it and process it so that it passes a square wave back into the drivers?
You use a CT in a similar configuration like your secondary base current sense, just pass the primary wire through it instead of the secondary ground. The current on the CT output will be increased of course, so the clamping circuit and nearby components would need to be modified. There are different ways of dealing with this.
Re: First SSTC design - Need some critique
DerStrom8, Thu Jun 26 2014, 05:37PM

I've been thinking guys, should I stick with the dual schmitt-trigger inverter to clean up the feedback, or should I opt for a zero-crossing detector instead? I'm just wondering if there's a way I can improve the signal conditioning section of the circuit.
Re: First SSTC design - Need some critique
Dr. Dark Current, Thu Jun 26 2014, 06:03PM

The Schmitt trigger inverter is perfect for this job, I'm not aware of any better solution. And you can use only one inverter gate, two of them are not required.
Re: First SSTC design - Need some critique
DerStrom8, Thu Jun 26 2014, 07:28PM

wrote ...

When the interrupter is disabled, there should be no voltage on the GDT primary. As you pointed out, the drivers by itself are always at opposite logic levels when the inputs are connected, so in this configuration they are unable to turn off the GDT.
Also, you did want to power the gate drivers from 5 volts? NO, use 12 or 15 volts.

I see what you mean now. To this point I was using the interrupter to switch the phase, but I see now that that is not what I want to be doing. ONLY the feedback should be changing the phase, correct? That actually explains a lot of the confusion I was having. I was thinking of replacing the TC4420/9 with the UCC27425, which has an inverting and a non-inverting driver, but includes enable pins. I think that would be best in this case, as the interrupter would do its job correctly.

wrote ...

I would use 10 nF but I guess it doesn't matter much. The 10 nF one will quicker block the DC voltage.
In this application, you can clamp the CT output to the 5V rail by two 1N4148 diodes. The current here is small. If the current would be larger, you would need to make sure the voltage of the 5V rail does not increase because of the additional rectified "supply current"; in this case it's best to clamp the input to the zener diode instead of the 5V supply.

I'm sure I can get my hands on a 10nF capacitor, so I won't need to use a 100nF one.

wrote ...

You use a CT in a similar configuration like your secondary base current sense, just pass the primary wire through it instead of the secondary ground. The current on the CT output will be increased of course, so the clamping circuit and nearby components would need to be modified. There are different ways of dealing with this.

Sounds good, I'll give that a try!

Dr. Dark Current wrote ...

The Schmitt trigger inverter is perfect for this job, I'm not aware of any better solution. And you can use only one inverter gate, two of them are not required.

Would there be any benefit to using two? Obviously the signal wouldn't be inverted, but I don't know if that's really important. Of course, with two there will be more of a delay. I may just use one after all.

Thanks,
Matt
Re: First SSTC design - Need some critique
Dr. Dark Current, Thu Jun 26 2014, 07:38PM

Yes two of them will just increase delay. You can change the phase by the CT connection. IIRC I've had some problems way back with 1 inverter gate producing false pulses, but that was probably just a bad layout. If your frequency is say below 300 kHz, you can use two gates, above that I would use one.
Re: First SSTC design - Need some critique
DerStrom8, Thu Jun 26 2014, 11:29PM

Hi folks,

Just checking that I've done this right:

  • I am using a UCC27425 dual MOSFET driver, which contains one inverting and one non-inverting gate, as well as actual enable pins. I could probably still use the TC4420/9 with NAND gates, but I figure the smaller the better. This way I only need a single 8-pin DIP package.

  • I have added a DC-blocking capacitor in series with the driver output to prevent it from shorting out the chip

  • I am using a 1:1:1:1:1 GDT instead of a center-tapped one (which I realize was a terrible idea from the start)

  • Two of the secondaries of the GDT are in-phase with the primary, and two are out of phase. Each secondary is connected (through a 10-ohm resistor to the gate of its corresponding FET (the in-phase windings are connected to the FETs diagonally opposite from each other in the H-bridge)

  • I have added back-to-back 20V zener diodes between the gate and source of each FET to prevent voltage spikes from damaging them. I may opt for a TVS diode, but either should work ok

  • I have added a decoupling capacitor between +50V and Ground in the H-bridge

  • I added a 4.7uF film capacitor in series with the primary to also block DC

  • Current transformer is simply a ferrite toroid transformer with ~50 windings for the feedback, and the primary coil wire is passed through the center

  • One side of the CT output is grounded, the other is passed through a 10nF capacitor into a single Schmitt trigger inverter (7414)

  • Between the capacitor and the schmitt trigger I have opted to use two Schottky diodes to clamp to the 5V rail, which is from a separate supply. It is well-regulated, so I would not worry too much about fluctuation, at least not to an extent that would cause problems


I will see about re-drawing my schematic so that it is more readable. I have been drawing it by hand, and I admit my handwriting is pretty awful! tongue

So far, does everything sound correct? I believe I've followed your suggestions, but feel free to correct me if I misinterpreted them.

Cheers,
Matt
Re: First SSTC design - Need some critique
Dr. Dark Current, Thu Jun 26 2014, 11:47PM

wrote ...

Current transformer is simply a ferrite toroid transformer with ~50 windings for the feedback, and the primary coil wire is passed through the center

One side of the CT output is grounded, the other is passed through a 10nF capacitor into a single Schmitt trigger inverter (7414)
The output current from the CT will be MUCH higher if you use primary feedback. Like 1 amp or more. Simply clamping to the 5V rail is not possible; the regulation of the supply plays no role here, what matters is that the supply cannot take reverse current. Wind more turns on the CT (like at least 100) and clamp the output using 1 amp Schottky diodes (1N5818) to a beefy ("5 watt") zener diode, which should have a voltage rating of about 4-4.7V. Connect a 100 ohm safety resistor in series with the Schmitt inverter's input. Because of the high current involved, increase the DC blocking capacitor size to 100nF (or rather 220nF).

Note: Schottky diodes have a relatively high capacitance. Using them to clamp the high current transformed from the primary winding is OK, but if you used them to clamp the CT sensing the secondary base current, you would again have problems with delays. In the second case, use 1N4148 signal diodes.

The other points seem correct.

Jan
Re: First SSTC design - Need some critique
DerStrom8, Fri Jun 27 2014, 12:53AM

Dr. Dark Current wrote ...

The output current from the CT will be MUCH higher if you use primary feedback. Like 1 amp or more. Simply clamping to the 5V rail is not possible; the regulation of the supply plays no role here, what matters is that the supply cannot take reverse current. Wind more turns on the CT (like at least 100) and clamp the output using 1 amp Schottky diodes (1N5818) to a beefy ("5 watt") zener diode, which should have a voltage rating of about 4-4.7V. Connect a 100 ohm safety resistor in series with the Schmitt inverter's input. Because of the high current involved, increase the DC blocking capacitor size to 100nF (or rather 220nF).

Note: Schottky diodes have a relatively high capacitance. Using them to clamp the high current transformed from the primary winding is OK, but if you used them to clamp the CT sensing the secondary base current, you would again have problems with delays. In the second case, use 1N4148 signal diodes.

The other points seem correct.

Jan

I was wondering how the higher current on the feedback transformer would be handled. I see now what you meant regarding the 5v supply.

Now, when you suggest clamping the output to the zener using the schottkys, I guess I'm still a bit unclear as to how this would be connected...?

I'm not sure if I can get my hands on high-power zeners, but I will see what I can find.

In regards to the current transformer, someone recommended I use a 1:1000 transformer, which is created using two toroid cores, each wrapped with two (twisted) wires connected in such a way as to get 32 windings on each, and 1024 windings total (32*32). I'm wondering if I ought to go this route. What are your thoughts?

Thanks,
Matt
Re: First SSTC design - Need some critique
Dr. Dark Current, Fri Jun 27 2014, 08:03AM

Like this
1403856055 152 FT164145 Ct


If you use a 1:1000 transformer, the current will be lower and you can then use a "standard 1.3-watt" Zener diode. It doesn't hurt to use your brain to solve such simple problems smile The current on the sec side is the current on the primary side divided by number of turns. The primary current is your design thing, then from this calculate the clamping circuit. Even with the 1:1000 CT I would still use a Zener diode and not clamp the output to the 5V supply.
Re: First SSTC design - Need some critique
Steve Conner, Fri Jun 27 2014, 09:18AM

Or how about the CT setup I use, a 1:33 (or 1:100 for larger coils) with two UF5408 type diodes for a burden. See top right of this schematic: Link2

This gives about 2V p-p output at the usual primary current. I also use an ordinary burden resistor in series to drive a peak current meter, but this isn't necessary.
Re: First SSTC design - Need some critique
DerStrom8, Fri Jun 27 2014, 11:24AM

Dr. Dark Current wrote ...

Like this
1403856055 152 FT164145 Ct


If you use a 1:1000 transformer, the current will be lower and you can then use a "standard 1.3-watt" Zener diode. It doesn't hurt to use your brain to solve such simple problems smile The current on the sec side is the current on the primary side divided by number of turns. The primary current is your design thing, then from this calculate the clamping circuit. Even with the 1:1000 CT I would still use a Zener diode and not clamp the output to the 5V supply.

Hmm, guess I was over-thinking the schematic tongue

I knew a 1:1000 transformer would drop the current significantly more, my question was more about if there were any disadvantages compared to a 1:100 transformer.

@Steve Connor, your schematic actually popped up several times in my searches, and is one of the ones I've used for reference.




here is the updated schematic. Please excuse the crudity of this model. I didn't have time to build it to scale or paint it. tongue

It reflects all of the changes you guys have suggested. Once again, feel free to let me know if I've missed something!

Thanks,
Matt
1403876152 3704 FT164145 Sstc
Re: First SSTC design - Need some critique
Dr. Dark Current, Fri Jun 27 2014, 01:56PM

What does the cap on the output of the 74HC14 do? o_0

P.S. If you use the coil as an DRSSTC with no loop delay compensation (as your current circuit) I highly suggest you to use IGBTs with ultrafast antiparallel diodes rather than MOSFETs. This is because the switching transitions happen after current zero crossings, which forces recovery of the free-wheeling diodes. The body diodes of MOSFETs are relatively much too slow for this.
On the other hand, using it as a single-resonant SSTC, FETs are a better choice, because the magnetizing inductance of the primary moves the switching transitions before current zero crossings (usually).
Re: First SSTC design - Need some critique
DerStrom8, Fri Jun 27 2014, 02:49PM

Dr. Dark Current wrote ...

What does the cap on the output of the 74HC14 do? o_0

P.S. If you use the coil as an DRSSTC with no loop delay compensation (as your current circuit) I highly suggest you to use IGBTs with ultrafast antiparallel diodes rather than MOSFETs. This is because the switching transitions happen after current zero crossings, which forces recovery of the free-wheeling diodes. The body diodes of MOSFETs are relatively much too slow for this.
On the other hand, using it as a single-resonant SSTC, FETs are a better choice, because the magnetizing inductance of the primary moves the switching transitions before current zero crossings (usually).

The 100pF cap filters out the extremely high frequencies that I don't really want going into the 27425. It's not critical, but one of those "nice to have" things.

You actually bring up a point that I have been considering. To this point I have been designing this coil around MOSFETs because it's what I have in my parts bin. I realize they are slower and probably not the best for high-frequency circuits, so if I do turn this into a DRSSTC I will swap them out with IGBTs. For the time being, though, I think I'll just stick with the MOSFETs and get a working TC. I can then make modifications from there.

Oh, and they are not shown in the schematic, but yes--each of the chips (the UCC27425 and the 7414) have decoupling caps. I simply opted not to show the power pins on the schematic, so I did not show the caps.

Thanks,
Matt
Re: First SSTC design - Need some critique
Dr. Dark Current, Fri Jun 27 2014, 05:18PM

MOSFETs are faster devices than IGBTs. It's just their body diode which is slow. However the FETs can not take such high pulsed currents, so they are better for coils with lower peak powers and higher duty cycles.

I don't see why you do want to slow down the transitions into the gate drivers. Having them as fast as possible is not a bad thing, often it is required. The cap will just increase your loop delay and present unnecessary load onto the inverter gate's output.
Re: First SSTC design - Need some critique
DerStrom8, Fri Jun 27 2014, 08:26PM

Dr. Dark Current wrote ...

MOSFETs are faster devices than IGBTs. It's just their body diode which is slow. However the FETs can not take such high pulsed currents, so they are better for coils with lower peak powers and higher duty cycles.

I don't see why you do want to slow down the transitions into the gate drivers. Having them as fast as possible is not a bad thing, often it is required. The cap will just increase your loop delay and present unnecessary load onto the inverter gate's output.

The 100pF cap is supposed to filter out the MHz harmonics, but can be omitted if necessary. I actually borrowed it from loneocean's SSTC2 design.

I have always found IGBTs to be more expensive than MOSFETs, but I came across something once that said it was the other way around? The MOSFETs I have now are junk-bin ones and are really only going to be used for testing. They're IRF350s in TO-3 packages. The datasheets say they are rated for 400V @14A, though the on resistance is quite high--0.3 ohms--and I'm not certain about the switching frequency. The datasheet says it has a 35nS turn-on time and a 150nS turn-off time, so if I did my math right it should be able to switch fast enough, though I'm not 100% sure on this. Eventually I do hope to swap all of them out with proper IGBTs.



Hi again, I've been thinking--

Shouldn't the feedback match the frequency of the secondary? If so, how would primary feedback work in a regular SSTC if it is not actually in tune with the secondary? I guess this is a little confusing to me.

On another note, do you have recommendations for winding the GDT? I'm thinking of making two transformers with paralleled primaries, and two secondaries on each core. The other option would be to wind all of the coils on one core, but I think that would require a larger toroid, which would be more expensive. I'm just wondering how other people have wound their GDTs.

Thanks for all the help guys, things are really coming together now.

Regards,
Matt
Re: First SSTC design - Need some critique
Dr. Dark Current, Fri Jun 27 2014, 10:52PM

Primary feedback will not work in an SSTC, I thought this has been already said a bit.

-> If the circuit is to be used as an DRSSTC, a primary current feedback is a much better option than secondary base current feedback.
Re: First SSTC design - Need some critique
loneoceans, Fri Jun 27 2014, 10:57PM

DerStrom8 wrote ...

Hi again, I've been thinking--

Shouldn't the feedback match the frequency of the secondary? If so, how would primary feedback work in a regular SSTC if it is not actually in tune with the secondary? I guess this is a little confusing to me.

On another note, do you have recommendations for winding the GDT? I'm thinking of making two transformers with paralleled primaries, and two secondaries on each core. The other option would be to wind all of the coils on one core, but I think that would require a larger toroid, which would be more expensive. I'm just wondering how other people have wound their GDTs.

Thanks for all the help guys, things are really coming together now.

Regards,
Matt


I think there a little bit of confusion in the thread since you mentioned you wanted to build a DRSSTC at the beginning. I'd recommend going with an SSTC first since it's just easier to get running. For DRSSTCs, primary feedback is usually used, and secondary for normal SSTCs (as you mentioned, no resonance going on in the primary for a normal SSTC, so you cannot use pri feedback). In fact, antenna works pretty well too in my experience. I never encountered any problems with or without the 100pF cap so no need to put it in. You don't need a bit GDT for your full bridge (and they're not expensive either) - just a few dollars online for a 1" core which will be enough for you if you use thinner wire.

If I had a small core, I'd wind it with 6 thin wires twisted together. 4 of them go to the transistors, and two of them will be in parallel and wired to the driver. Just make sure your phasing it correct! For sure you could wind two cores - it'll be exactly as described on my page, with the primaries in parallel. Or you could just go for a half bridge first which will save you half of the parts! Again most of the components are really not expensive - suitable IGBTs or MOSFETs all run for around $3 or less on digikey which would work great!

There are several reasons why people like IGBTs for DRSSTC use because of the lower losses (proportional to I in IGBTs but squared for mosfets), higher current handling capability and usually nice fast integrated body diodes. As Dr. Spark said, they're also usually slower, but some of the nice new ones on the market today are approaching the speeds of older Mosfets! I've pushed TO220 igbts to 800kHz in DRSSTC operation and they seem to be fine. :o
Re: First SSTC design - Need some critique
DerStrom8, Fri Jun 27 2014, 11:16PM

Dr. Dark Current wrote ...

Primary feedback will not work in an SSTC, I thought this has been already said a bit.

-> If the circuit is to be used as an DRSSTC, a primary current feedback is a much better option than secondary base current feedback.

loneoceans wrote ...

I think there a little bit of confusion in the thread since you mentioned you wanted to build a DRSSTC at the beginning. I'd recommend going with an SSTC first since it's just easier to get running. For DRSSTCs, primary feedback is usually used, and secondary for normal SSTCs (as you mentioned, no resonance going on in the primary for a normal SSTC, so you cannot use pri feedback). In fact, antenna works pretty well too in my experience. I never encountered any problems with or without the 100pF cap so no need to put it in. You don't need a bit GDT for your full bridge (and they're not expensive either) - just a few dollars online for a 1" core which will be enough for you if you use thinner wire.

If I had a small core, I'd wind it with 6 thin wires twisted together. 4 of them go to the transistors, and two of them will be in parallel and wired to the driver. Just make sure your phasing it correct! For sure you could wind two cores - it'll be exactly as described on my page, with the primaries in parallel. Or you could just go for a half bridge first which will save you half of the parts! Again most of the components are really not expensive - suitable IGBTs or MOSFETs all run for around $3 or less on digikey which would work great!

There are several reasons why people like IGBTs for DRSSTC use because of the lower losses (proportional to I in IGBTs but squared for mosfets), higher current handling capability and usually nice fast integrated body diodes. As Dr. Spark said, they're also usually slower, but some of the nice new ones on the market today are approaching the speeds of older Mosfets! I've pushed TO220 igbts to 800kHz in DRSSTC operation and they seem to be fine. :o

I had a feeling that was the cause of the confusion. I should have specified that I am starting with an ordinary SSTC and eventually will probably modify it later on to be a DRSSTC. I apologize for misleading you. Since this is the case, I will be using the secondary feedback (which makes much more sense to me! tongue) that I originally planned on. I will probably change it when I convert it into a DRSSTC.

I found examples of people using Ethernet wires for the GDT, which I think I may do--they are cheap and easy to source, and there are 8 wires in each cable already. I will probably do the same for the secondary feedback winding.

Again, this is all great info, so thanks very much!
Cheers,
Matt

I understand how the losses tend to be more significant in MOSFETs. Some day (hopefully soon) I will look into getting some IGBTs, but again, I already have some FETs that will probably work, so I may as well just start with them wink
Re: First SSTC design - Need some critique
GrantX, Sat Jun 28 2014, 06:16AM

DerStrom8 wrote ...

Hi again, I've been thinking--

Shouldn't the feedback match the frequency of the secondary? If so, how would primary feedback work in a regular SSTC if it is not actually in tune with the secondary? I guess this is a little confusing to me.

On another note, do you have recommendations for winding the GDT? I'm thinking of making two transformers with paralleled primaries, and two secondaries on each core. The other option would be to wind all of the coils on one core, but I think that would require a larger toroid, which would be more expensive. I'm just wondering how other people have wound their GDTs.

Thanks for all the help guys, things are really coming together now.

Regards,
Matt

http://thedatastream.4hv.org/gdt_index.htm This site has been invaluable in helping me understand proper GDT design. It covers the important theory elements, as well as core selection and winding techniques. Very nice to keep in your bookmarks.

EDIT: Sorry, I didn't see that your questions regarding feedback had already been answered.

You're definitely getting there.

Primary feedback: DRSSTC - both the primary and secondary are resonant tank circuits, ideally both tuned to almost the same frequency. In a DRSSTC you need to see how far the primary current is ringing up; since the inverter is switching at the primary circuit's resonant frequency the current gets bigger each half cycle (the simplified version as I currently understand it, I'm still learning as well).

Secondary base feedback: standard SSTC - only the secondary is being driven at it's resonant frequency, thus the primary current stays pretty much steady. Less turns on the primary means less impedance and thus more input current. Again, simplified version.

Designing a single-resonant SSTC seems very similar to other "normal" switch mode power supplies.
Re: First SSTC design - Need some critique
Steve Conner, Sat Jun 28 2014, 12:25PM

If you want to use that 100pF capacitor to filter out high frequencies, it should probably be on the input of the logic gate, not the output.
Re: First SSTC design - Need some critique
DerStrom8, Sat Jun 28 2014, 12:49PM

GrantX wrote ...

DerStrom8 wrote ...

Hi again, I've been thinking--

Shouldn't the feedback match the frequency of the secondary? If so, how would primary feedback work in a regular SSTC if it is not actually in tune with the secondary? I guess this is a little confusing to me.

On another note, do you have recommendations for winding the GDT? I'm thinking of making two transformers with paralleled primaries, and two secondaries on each core. The other option would be to wind all of the coils on one core, but I think that would require a larger toroid, which would be more expensive. I'm just wondering how other people have wound their GDTs.

Thanks for all the help guys, things are really coming together now.

Regards,
Matt

http://thedatastream.4hv.org/gdt_index.htm This site has been invaluable in helping me understand proper GDT design. It covers the important theory elements, as well as core selection and winding techniques. Very nice to keep in your bookmarks.

EDIT: Sorry, I didn't see that your questions regarding feedback had already been answered.

You're definitely getting there.

Primary feedback: DRSSTC - both the primary and secondary are resonant tank circuits, ideally both tuned to almost the same frequency. In a DRSSTC you need to see how far the primary current is ringing up; since the inverter is switching at the primary circuit's resonant frequency the current gets bigger each half cycle (the simplified version as I currently understand it, I'm still learning as well).

Secondary base feedback: standard SSTC - only the secondary is being driven at it's resonant frequency, thus the primary current stays pretty much steady. Less turns on the primary means less impedance and thus more input current. Again, simplified version.

Designing a single-resonant SSTC seems very similar to other "normal" switch mode power supplies.


I'll definitely take a look at the link, thank you very much!

Yes, I understand why you'd want to use a feedback transformer on the primary in a DRSSTC and why you can't on a regular SSTC. For a little while I was thinking I had mentioned that I wanted to start with a regular SSTC (which apparently I hadn't yet) and someone recommended a primary feedback transformer, and I couldn't understand how that would work. I see that it was a lack of communication on my part though, so things seem to fit my understanding and assumptions better now.

It's funny you should mention SMPSs--Every time I look at a SSTC schematic I think of a SMPS, and vice versa. They are very similar in a lot of ways. Just another idea of Tesla's that's leaked into modern technology! He really was the inventor of modern electronics wink

Steve Conner wrote ...

If you want to use that 100pF capacitor to filter out high frequencies, it should probably be on the input of the logic gate, not the output.

This has been noted, thank you!

I just need to get a few more parts and I should be able to start prototyping and testing before doing the full build.

Hi all, just thought I'd post some of my calculations here to make sure I'm doing things right.

Years ago I built a spark gap Tesla coil and I hope to re-use the secondary from it. The coil is about 19 inches tall wound around 4" ID PVC, giving the coil a diameter of about 4.5". Calculating the inductance using the formula,

L = (r^2 * t^2)/(9*r+10*l)

where L is the inductance, r is the radius, t is the # of turns, and l is the length, I get an inductance of 34.54mH.

For the topload I plan on starting with some aluminum dryer duct (also the same topload I used on my SGTC) with has a large diameter of 12.5" and a small diameter/height of 4 inches. This gives me a calculated capacitance of around 13.9pF.

Then, using the formula

f = 1/(2*pi*(L*C)^(1/2))

where f is the frequency, L is the inductance, and C is the capacitance, I get a resonant frequency of around 230KHz. I think this will probably be reasonable. How do you guys feel about these figures?

Cheers,
Matt
Re: First SSTC design - Need some critique
Sigurthr, Sat Jun 28 2014, 05:56PM

Keep in mind that if you use secondary current feedback for a SSTC you can't run it CW without a pull up resistor/momentary switch on the enable input (provided the gate drivers have an initialization pulse, like the UCC chips do, and your interrupter can sink current / pull down to ground as well as source) as the CT will look like a DC short to ground effectively pulling your feedback input to ground.
Re: First SSTC design - Need some critique
DerStrom8, Sat Jun 28 2014, 06:12PM

Sigurthr wrote ...

Keep in mind that if you use secondary current feedback for a SSTC you can't run it CW without a pull up resistor/momentary switch on the enable input (provided the gate drivers have an initialization pulse, like the UCC chips do, and your interrupter can sink current / pull down to ground as well as source) as the CT will look like a DC short to ground effectively pulling your feedback input to ground.

Ok, stupid question that I should know the answer to but don't--What does "CW" stand for?

But thanks, that's a good point. I will probably be using a pull-down resistor on the Enable input of the 27425, I just forgot to include it in the schematic. For the time being I am using an Arduino for the interrupter, which allows the user to adjust the frequency and duty cycle independently. I will probably replace it with less sensitive circuitry later on.

Thanks,
Matt
Re: First SSTC design - Need some critique
Sigurthr, Sat Jun 28 2014, 06:37PM

CW, or "constant wave" meaning uninterrupted.

We don't generally use the term anymore but most singly resonant SSTCs people make or see today are ISSTCs (interrupted SSTCs). To run CW is to run a "standard" SSTC; no interruption - the enable pins are pulled high and held there by either the interrupter (easily done on arduino / MCU) or a seperate switch and resistor or internal pullup resistors on the gate drive chips.

The issue is that when using a secondary base current transformer the input to the schmitt triggers is pulled to ground through the DC resistance of the CT, so there will be NO feedback. When you use an interrupter or operate in pulse mode the transition from low to high on the enable pins cause the gate drive chips to start up oscillation at whatever frequency is natural to them for a few cycles. This is enough to ping the resonator and cause a feedback signal to flow through the CT, which then takes over and sustains oscillation at the resonator's resonant frequency. If you don't use an interrupter or run "hard wired" CW (either from an unswitched pull-up resistor, or the chips internal pull ups) there is no transition from low to high on the enables and the chips don't know to send out the oscillation start pulse. The chips just sit there in the off state because there is no feedback present. Steve Ward's early designs used a 555 timer loosely capacitively coupled to the feedback input in order to start oscillation for this reason, but getting the right level of starter oscillation that doesn't swamp the feedback is tricky and problematic. I've found that a simple current limited oscillation start switch is all that is needed. Simply momentarily pull the enable pins to ground if no interrupter is connected or program the interrupter for a CW mode where output is brought from low to high and held there. The no interrupter + pull down resistor + switch is nice as it also performs the function of an emergency off switch.

Feel free to check out my site about SSTCs, which has all of my schematics, write-ups, and data files freely available for download. Link2 There's also videos of my coils and designs working, as well as a video on how to properly phase a GDT.
Re: First SSTC design - Need some critique
Dr. Dark Current, Sat Jun 28 2014, 06:42PM

Use Javatc to calculate the resonance. The secondary coil itself has a distributed capacitance, the primary and topload position also play roles (additional capacitances etc). By using the calculations you wrote, the error can probably be as large as 50%.
Re: First SSTC design - Need some critique
DerStrom8, Sat Jun 28 2014, 07:06PM

Sigurthr wrote ...

CW, or "constant wave" meaning uninterrupted.

We don't generally use the term anymore but most singly resonant SSTCs people make or see today are ISSTCs (interrupted SSTCs). To run CW is to run a "standard" SSTC; no interruption - the enable pins are pulled high and held there by either the interrupter (easily done on arduino / MCU) or a seperate switch and resistor or internal pullup resistors on the gate drive chips.

The issue is that when using a secondary base current transformer the input to the schmitt triggers is pulled to ground through the DC resistance of the CT, so there will be NO feedback. When you use an interrupter or operate in pulse mode the transition from low to high on the enable pins cause the gate drive chips to start up oscillation at whatever frequency is natural to them for a few cycles. This is enough to ping the resonator and cause a feedback signal to flow through the CT, which then takes over and sustains oscillation at the resonator's resonant frequency. If you don't use an interrupter or run "hard wired" CW (either from an unswitched pull-up resistor, or the chips internal pull ups) there is no transition from low to high on the enables and the chips don't know to send out the oscillation start pulse. The chips just sit there in the off state because there is no feedback present. Steve Ward's early designs used a 555 timer loosely capacitively coupled to the feedback input in order to start oscillation for this reason, but getting the right level of starter oscillation that doesn't swamp the feedback is tricky and problematic. I've found that a simple current limited oscillation start switch is all that is needed. Simply momentarily pull the enable pins to ground if no interrupter is connected or program the interrupter for a CW mode where output is brought from low to high and held there. The no interrupter + pull down resistor + switch is nice as it also performs the function of an emergency off switch.

Feel free to check out my site about SSTCs, which has all of my schematics, write-ups, and data files freely available for download. Link2 There's also videos of my coils and designs working, as well as a video on how to properly phase a GDT.

Okay, I was very close! I had the right definition for "CW" in mind, I just wasn't sure what it stood for. I just assumed "C" stood for "continuous" and figured it meant "without interruption". I do not plan to run this coil in continuous mode at all, but I will still have a pull-down resistor. I only want the coil to run when I tell it to via the enable pins on the UCC27425.

Definitely going to check out the link, thanks very much!

Dr. Dark Current wrote ...

Use Javatc to calculate the resonance. The secondary coil itself has a distributed capacitance, the primary and topload position also play roles (additional capacitances etc). By using the calculations you wrote, the error can probably be as large as 50%.

I completely forgot about that. When I first started thinking about the coil I knew that the secondary coil would have some capacitance, but when I got to the design part I forgot to consider it. I ran a quick test with JavaTC but my values weren't very accurate. I will run it again and will get back to you. Thanks for pointing this out!

I ran JavaTC, only filling in information for the secondary and topload, and this is the output:

1anhc

So it looks like I was off by around 34KHz. I am thinking I will most likely add a second toroid on top of the current one. I'm about to add that into JavaTC to see what I get.

By the way, the image JavaTC creates based on the information seems to be in the wrong place for me. Does anyone else have this issue?

2v0cpk0

Sigurthr wrote ...
Feel free to check out my site about SSTCs, which has all of my schematics, write-ups, and data files freely available for download. Link2 There's also videos of my coils and designs working, as well as a video on how to properly phase a GDT.

Hello Sigurthr,

I did not realize you ("Sigurthr") were Matt Giordano. I have watched several of your Youtube videos for inspiration! cheesey

After adding the second toroid I get ~232kHz, which sounds much closer to what I was looking for.

9lbkwg
6nuqhj

Regards,
Matt
Re: First SSTC design - Need some critique
Mads Barnkob, Sat Jun 28 2014, 09:00PM

DerStrom8: You have managed to make 7 double posts and 1 quadruple post.

You need to read the site rules before you post again! Link2

Use the edit function and if you need additional attachment in a edit, use the attachment forum for that.

Consider this a fair warning as I have to merge so many posts.


A topic related note, SSTCs does not always like huge toploads, with the increased load to drive it can more easily flash over at the primary that usually have a very tight coupling to the secondary in a SSTC.
Re: First SSTC design - Need some critique
DerStrom8, Sat Jun 28 2014, 09:09PM

Mads Barnkob wrote ...

DerStrom8: You have managed to make 7 double posts and 1 quadruple post.

You need to read the site rules before you post again! Link2

Use the edit function and if you need additional attachment in a edit, use the attachment forum for that.

Consider this a fair warning as I have to merge so many posts.


A topic related note, SSTCs does not always like huge toploads, with the increased load to drive it can more easily flash over at the primary that usually have a very tight coupling to the secondary in a SSTC.

My apologies, I was not aware that I was breaking the rules. Do you consider "double posts" to be consecutive, or duplicate? I am a moderator on another forum and a member on another one after that, and I guess I'm used to their rules, since they seemed fairly standard. I assumed they were the same here, though perhaps I shouldn't have. I'll take a look at the rules for this specific site.

Thanks for the note regarding the large topload. I had not thought of that. Perhaps I should rethink the overall size of the secondary. I was hoping to re-use my SGTC secondary, but maybe that's not the best idea, especially for such a low-power TC.

Thanks, and once again I apologize for the multiple posts in a row. I'll remember that they're discouraged from now on. Thanks for merging them for me.

Cheers,
Matt
Re: First SSTC design - Need some critique
Sigurthr, Sat Jun 28 2014, 09:11PM

Yep, that's me, heh, thanks for the views and appreciation! One day I'll get around to changing my given name, but it's very expensive and quite a big hassle. I originally had an actual youtube channel name that wasn't my legal name but when google merged with youtube they forced my legal name upon my channel.

I've had luck with pushing up to a 12"x3" toroid on a CW standard SSTC, but beyond that I ran into issues as Mads has mentioned. You should look into adding turns to lower the fres instead of a second topload. You won't have nearly as much trouble with eddy currents heating your secondary when running ISSTC though, so you'll be able to get away with pretty tight coupling if you insulate well.
Re: First SSTC design - Need some critique
DerStrom8, Sat Jun 28 2014, 09:36PM

Sigurthr wrote ...
I've had luck with pushing up to a 12"x3" toroid on a CW standard SSTC, but beyond that I ran into issues as Mads has mentioned. You should look into adding turns to lower the fres instead of a second topload. You won't have nearly as much trouble with eddy currents heating your secondary when running ISSTC though, so you'll be able to get away with pretty tight coupling if you insulate well.

Okay, then my thought for a second topload is probably a very bad idea. The lower one is 4"x12.5", so that will give you an idea of the scale. I considered picking up some cheap 3" diameter duct from my local Kmart, so I might use that to make a toroid instead of re-using the one I have. Furthermore, I have reconsidered reusing my other secondary. I'm thinking I might just get a 6" diameter PVC pipe and wind a new coil about 16" high. Calculating for a toroid 3" x 10", I get a frequency of ~191kHz. I can't complain about that! It might look a little goofy, but it should work (assuming I didn't miss something).

Thanks again for the feedback!
Matt
Re: First SSTC design - Need some critique
TwirlyWhirly555, Sat Jun 28 2014, 10:06PM

I used plastic laminate sheets round my mini SSTC to stop flash overs ,

9" arcs from a 2"x2.8" secondary keep going down before that :P
Re: First SSTC design - Need some critique
DerStrom8, Sat Jun 28 2014, 11:27PM

TwirlyWhirly555 wrote ...

I used plastic laminate sheets round my mini SSTC to stop flash overs ,

9" arcs from a 2"x2.8" secondary keep going down before that :P

Wow, that sounds like a very small coil... confused

Once again, I've rethought my secondary. I would really prefer to use the one I already have, but that means fres would be higher--around 273.6kHz. I think that's still well in the acceptable range, though I don't have experience with this. perhaps someone else can verify....?

The current idea is to use my 4.5" x 19" secondary and make a small (3" x 10") toroid out of 3" aluminum dryer duct. Based on JavaTC, these are the results I get:

2j1k5jb

I also downloaded JavaTC and edited the HTML file so that I could view the entire graphic without it overlapping text:

1ely6u

The ratio looks a little better, and it doesn't require me to use up more wire than I need to.
Re: First SSTC design - Need some critique
Sigurthr, Sun Jun 29 2014, 12:19AM

Why not just shrink the tank cap or increase tap range on primary?
Re: First SSTC design - Need some critique
DerStrom8, Sun Jun 29 2014, 03:05AM

Sigurthr wrote ...

Why not just shrink the tank cap or increase tap range on primary?

I'm just building a basic SSTC for the time being, so there isn't a tank cap. But I'm trying to figure out the best size of secondary and topload to get a resonant frequency of between 200 and 300 kHz (ideally).
Re: First SSTC design - Need some critique
Sigurthr, Sun Jun 29 2014, 04:50AM

I thought so but couldn't figure out why you were worried about the target frequency so I assumed you might be trying a hybrid type construction, switchable between DR and SR.

I wouldn't stress over the actual resonant frequency then. I've made successful SSTCs up to 1.1MHz that hard switch the FETs in CW at several hundred watts of power. Use what secondary and topload you want to, what difference does it make if it is 230KHz or 290KHz? Just my 2 cents. =)

Edit: forgot to change KHz to MHz, my bad!
Re: First SSTC design - Need some critique
mbd, Sun Jun 29 2014, 08:06AM

DerStrom8 wrote ...

By the way, the image JavaTC creates based on the information seems to be in the wrong place for me. Does anyone else have this issue?

2v0cpk0
DerStrom8 wrote ...

I also downloaded JavaTC and edited the HTML file so that I could view the entire graphic without it overlapping text:

1ely6u

The ratio looks a little better, and it doesn't require me to use up more wire than I need to.

You might want to go back and check that you have entered the various heights correctly into JavaTC. The only times that I have had trouble with the graphic like you have shown, the fault has been entirely mine. I strongly suspect (but have not verified) that JavaTC will give you a lower Fres if it has been lead to believe that your coil is going to operated partly buried ...
Re: First SSTC design - Need some critique
Dr. Dark Current, Sun Jun 29 2014, 11:00AM

1100MHz! And I thought designing a 60MHz, 1kW resonant vacuum tube oscillator was a challenge.
cheesey

(...I know, I just had to.)

BTW. FETs can switch really fast, but it's often the active feedback schemes which limit the useful frequency range, caused by delays and phase shifts in the loop. For higher frequencies, self-excited oscillators are the way to go. But the basic PLL circuit can be used well over 1 MHz, the direct amplifying feedback will work well to maybe 500 kHz.
Re: First SSTC design - Need some critique
DerStrom8, Sun Jun 29 2014, 12:27PM

Sigurthr wrote ...

I thought so but couldn't figure out why you were worried about the target frequency so I assumed you might be trying a hybrid type construction, switchable between DR and SR.

I wouldn't stress over the actual resonant frequency then. I've made successful SSTCs up to 1100MHz that hard switch the FETs in CW at several hundred watts of power. Use what secondary and topload you want to, what difference does it make if it is 230KHz or 290KHz? Just my 2 cents. =)

In a way you're correct--I will eventually want to switch it over to a DRSSTC--but for the time being I'm just making a plain SSTC. I am trying to make it as easy as possible to switch over though, which is why I'm trying to keep the resonant frequency within a decent range.

1100 MHz, eh? That must have been an interesting build tongue

mbd wrote ...

You might want to go back and check that you have entered the various heights correctly into JavaTC. The only times that I have had trouble with the graphic like you have shown, the fault has been entirely mine. I strongly suspect (but have not verified) that JavaTC will give you a lower Fres if it has been lead to believe that your coil is going to operated partly buried ...

I was wondering if that was the case, that I was entering the heights incorrectly. For height 1 (Low-voltage end) I put in 1 inch, assuming it would be 1 inch off the stand, and for height 2 (high voltage end) I entered the height of the coil +1". I think I must have made a mistake in this part somewhere.

Dr. Dark Current wrote ...

1100MHz! And I thought designing a 60MHz, 1kW resonant vacuum tube oscillator was a challenge.
cheesey

(...I know, I just had to.)

BTW. FETs can switch really fast, but it's often the active feedback schemes which limit the useful frequency range, caused by delays and phase shifts in the loop. For higher frequencies, self-excited oscillators are the way to go. But the basic PLL circuit can be used well over 1 MHz, the direct amplifying feedback will work well to maybe 500 kHz.

Very good to know. I'll probably still keep the frequency low because I eventually plan on swapping the FETs out with IGBTs when I swap over to the DRSSTC, and I will want to change as little as possible for the rest of the coil.
Re: First SSTC design - Need some critique
Dr. Dark Current, Sun Jun 29 2014, 12:55PM

All the heights in the JavaTC are relative to the ground plane. This includes the primary coil, secondary coil, topload, etc.
Enter something like 20" for the bottom height, this will work well. Also, make sure you enter the ground plane and wall dimensions about correct.

Another problems beginners could have with JavaTC:
-Coil dimensions are entered by the radius, not diameter
-Wire Dia / AWG switch in secondary coil wire size
-When using metric units, people sometimes have trouble entering all the dimensions in centimeters (especially the wire sizes)

If you've entered data of a secondary coil you already have, always check the DC resistance after completing the calculation. If it's off, you've made a mistake somewhere.
Re: First SSTC design - Need some critique
DerStrom8, Sun Jun 29 2014, 02:14PM

Dr. Dark Current wrote ...

All the heights in the JavaTC are relative to the ground plane. This includes the primary coil, secondary coil, topload, etc.
Enter something like 20" for the bottom height, this will work well. Also, make sure you enter the ground plane and wall dimensions about correct.

Another problems beginners could have with JavaTC:
-Coil dimensions are entered by the radius, not diameter
-Wire Dia / AWG switch in secondary coil wire size
-When using metric units, people sometimes have trouble entering all the dimensions in centimeters (especially the wire sizes)

If you've entered data of a secondary coil you already have, always check the DC resistance after completing the calculation. If it's off, you've made a mistake somewhere.

I will try raising up the LV end of the coil to about 20" and will get back to you.

In the meantime, I've been looking around at some IGBTs for when I convert it into a DRSSTC. I have been looking at 600V >30A continuous models, and I found a fairly cheap one on Mouser: Link2

I don't want to buy it unless you guys think it will work. Are there any other specs I should look at before deciding to purchase? Looking at the datasheet (link: Link2 ) it looks like these should be able to switch fast enough and the diode recover quickly. I'm planning to buy 10 of them, so that I have plenty of backups if anything goes wrong (which it probably will wink )

I'll get back to you on the JavaTC calculations. I also want to make sure that I have all the measurements correct.
Re: First SSTC design - Need some critique
Dr. Dark Current, Sun Jun 29 2014, 03:38PM

The part you posted is a relatively slow one. Have a look at the following part numbers:

HGTG20N60A4D (a relatively old transistor, but still fast even for today's standards and should be rugged)
(or other HGTG...A4D models)
FGH40N60SMD (a more modern part) (or other FGH...SMD models)
STGW30NC60WD (or other STGW...WD models)
Re: First SSTC design - Need some critique
DerStrom8, Sun Jun 29 2014, 04:01PM

Dr. Dark Current wrote ...

The part you posted is a relatively slow one. Have a look at the following part numbers:

HGTG20N60A4D (a relatively old transistor, but still fast even for today's standards and should be rugged)
(or other HGTG...A4D models)
FGH40N60SMD (a more modern part) (or other FGH...SMD models)
STGW30NC60WD (or other STGW...WD models)

Thanks very much for the part numbers. Those will be really helpful. They're more expensive then I was hoping, so I'll probably hold off for the time being. I'll keep my eyes open for options, though.

Thanks,
Matt

EDIT: I found a good deal on 10x HGTG20N60A4D IGBTs, so I will probably bite--$21.80 (USD) shipped. I have yet to find a better deal than that!
Re: First SSTC design - Need some critique
Steve Conner, Sun Jun 29 2014, 05:33PM

Sigurthr wrote ...

The issue is that when using a secondary base current transformer the input to the schmitt triggers is pulled to ground through the DC resistance of the CT, so there will be NO feedback.
I've always wondered why people don't bother to AC couple the feedback and DC bias the input approximately to the Schmitt trigger threshold. Seems like it would help the coil start up easier as oscillation would be sustained with a smaller signal from the CT.
Re: First SSTC design - Need some critique
DerStrom8, Sun Jun 29 2014, 07:02PM

Hi again,

Well as mentioned I will not be running this continuously, so I imagine I shouldn't have any issues with there being a lack of oscillations. However, if there are, I have a variety of options that you folks have presented.

Now, I'd like to ask your opinions about one other thought--

Since I just bought a bunch of IGBTs, I'm wondering if I should just start off with the DRSSTC instead of making a basic SSTC and upgrading later. I have a bag of 6kv 1500pF capacitors. I'm estimating a primary coil inductance of around 17uH, so in order to match the 273kHz Fres of the secondary I would need a tank capacitance of about 20nF. I can do that with 14 of them in parallel. My point is that I have all the parts I would need, so perhaps I should just go for it. What do you guys think?

Regards,
Matt
Re: First SSTC design - Need some critique
Dr. Dark Current, Sun Jun 29 2014, 07:04PM

Are the caps the power type (low dissipation factor)?
Re: First SSTC design - Need some critique
DerStrom8, Sun Jun 29 2014, 07:23PM

Dr. Dark Current wrote ...

Are the caps the power type (low dissipation factor)?

Actually, I"m not sure. They're high voltage ceramic caps that I bought second-hand at a swap meet. I know there are low-dissipation ceramic capacitors out there, but I see nothing on these that suggest they are the power type.


Infuk6

EDIT: I'm hoping the image isn't too large for the forum. It took me a few tries to upload this one tongue

MODERATOR EDIT: It certainly is, which you would also know if you had read the rules as I asked you to!

RESPONSE TO MOD EDIT: I actually uploaded it before remembering what the size limit was. It should be fixed now tongue

Use:
[img width=600]
Re: First SSTC design - Need some critique
Dr. Dark Current, Sun Jun 29 2014, 09:19PM

Unfortunately these caps are useless, they have a really huge dissipation factor.

Most coilers use polypropylene film / foil caps. Many manufacturers follow the markings - MKP for metallized film capacitor, MMKP for double metallized film and FKP for metal foil capacitor. FKP caps are most robust and most expensive. There are special kinds of HV RF power polypropylene caps - large cylinders. They are rare and very expensive usually.

Then there are another types of RF power caps which can be used: RF ceramic (values only up to few nF, several kV ratings, extremely low dissipation factor) and RF mica (higher capacitances). Unfortunately these caps are often quite expensive but almost indestructible.
Re: First SSTC design - Need some critique
Sigurthr, Sun Jun 29 2014, 09:33PM

Whoops, sorry folks! I wish I did a 1.1GHz build... I'd be competing with Zilipoper then! I typed 1100KHz and my phone autocorrected it to MHz. I edited the post. I need to stop replying via phone, it takes way too long anyway.

Steve Conner wrote ...

Sigurthr wrote ...

The issue is that when using a secondary base current transformer the input to the schmitt triggers is pulled to ground through the DC resistance of the CT, so there will be NO feedback.
I've always wondered why people don't bother to AC couple the feedback and DC bias the input approximately to the Schmitt trigger threshold. Seems like it would help the coil start up easier as oscillation would be sustained with a smaller signal from the CT.

I've always AC coupled the feedback on all my drivers, but you still have to provide (or allow for) an enable ping or a feedback ping to get the thing going as there is no oscillation (and thus no dV through the coupling cap) at the initialization state. Powering on the gate drive chips causes them to send an enable ping, but your inverter has to be ready to go as soon as you power the feedback and gate drive subsections for this to work. As a result many builds get away with no additional startup circuitry simply by using a certain powering up sequence. Not to mention most builds aren't ideally laid out or shielded, so you get mains noise coupled in to the feedback which provides the startup (feedback) ping even when an ideal power up sequence isn't used. This is usually the oscillation starter for antenna based feedback. When they use a CT for feedback though the impedance of the CT is low enough (as opposed to the input impedance of the shcmitt trigger input which is very high) that no mains noise shows up at the input, and thus no oscillation starts. I find it many coilers never look into these driver behaviors and quirks because so few of us run CW.

As for DC biasing the feedback to target it into the ideal range of the schmitt triggers I'm not sure that it is necessary. I've never had a problem getting secondary base CT feedback sufficient to sustain oscillation even at low power levels with any of my coils. They stay alive right down to 12V DC bus.
Re: First SSTC design - Need some critique
DerStrom8, Sun Jun 29 2014, 09:36PM

Dr. Dark Current wrote ...

Unfortunately these caps are useless, they have a really huge dissipation factor.

Most coilers use polypropylene film / foil caps. Many manufacturers follow the markings - MKP for metallized film capacitor, MMKP for double metallized film and FKP for metal foil capacitor. FKP caps are most robust and most expensive. There are special kinds of HV RF power polypropylene caps - large cylinders. They are rare and very expensive usually.

Then there are another types of RF power caps which can be used: RF ceramic (values only up to few nF, several kV ratings, extremely low dissipation factor) and RF mica (higher capacitances). Unfortunately these caps are often quite expensive but almost indestructible.

I had a feeling ceramic caps wouldn't work--I'm just not that lucky tongue

I did a quick search on ebay and found some ceramic polypropylene film capacitors (MKP) for pretty darn cheap. I'm not sure how high a voltage the primary will be seeing, but I expect 3kv should be ok? In that case I could put three capacitors in series and two strings in parallel to get 22nF and 3kv. Then again, the 1kv rating is DC....

Here are the caps I'm referring to: Link2
Re: First SSTC design - Need some critique
Sigurthr, Sun Jun 29 2014, 10:28PM

I recommend WIMA or Cornell Dubilier brands for capacitors if you can afford them, they're tried and true tested to be reliable for TC use.

Required MMC voltage rating for DRSSTCs is a complex subject with no simple answer. Most suggest a rule of thumb something near 10x the DC bus voltage.

If you want to dig into the heart of the matter;

Each half cycle the inverter increases the voltage seen by the primary capacitor by 1/2 DC bus for a half bridge or by 1x DC bus for a full bridge*. This effect is lessened by the degree of loading the resonator puts on the inverter, which is determined by the loading of the streamer on the resonator (largely unknown and variable). If you design for a totally unloaded resonator you can determine a worst case scenario voltage expected to be seen across the primary capacitor if you know the number of cycles the inverter will switch per burst, which is determined by the burst length of the interrupter and the resonant frequency of the primary and the over current limiting circuitry (which should be set according to the maximum pulse Ids of the IGBTs).

*I think. I can't find my notes and there was some confusion in the discussion I had with several experienced members about whether the voltage increases by 1/2 or 1 per half cycle for half or full bridge. Logically my mind says it should be as I typed above: 1/2 Vbus per half cycle for half bridge.
Re: First SSTC design - Need some critique
DerStrom8, Sun Jun 29 2014, 10:44PM

Sigurthr wrote ...

I recommend WIMA or Cornell Dubilier brands for capacitors if you can afford them, they're tried and true tested to be reliable for TC use.

Required MMC voltage rating for DRSSTCs is a complex subject with no simple answer. Most suggest a rule of thumb something near 10x the DC bus voltage.

If you want to dig into the heart of the matter;

Each half cycle the inverter increases the voltage seen by the primary capacitor by 1/2 DC bus for a half bridge or by 1x DC bus for a full bridge*. This effect is lessened by the degree of loading the resonator puts on the inverter, which is determined by the loading of the streamer on the resonator (largely unknown and variable). If you design for a totally unloaded resonator you can determine a worst case scenario voltage expected to be seen across the primary capacitor if you know the number of cycles the inverter will switch per burst, which is determined by the burst length of the interrupter and the resonant frequency of the primary and the over current limiting circuitry (which should be set according to the maximum pulse Ids of the IGBTs).

*I think. I can't find my notes and there was some confusion in the discussion I had with several experienced members about whether the voltage increases by 1/2 or 1 per half cycle for half or full bridge. Logically my mind says it should be as I typed above: 1/2 Vbus per half cycle for half bridge.

I'm afraid my budget is quite limited for this project--I'm trying to keep it below $50 for several reasons--so unfortunately I really can't get any expensive capacitors. For the time being I'm going to have to go with the bare minimum to get it to work. Judging by your figure of 10x the buss voltage, 3kV should be fine for my coil, considering I only plan on putting in 50-120v. Though, with the capacitors I linked to I would have enough to increase the voltage tolerance more than 3kv, so I guess if the material is acceptable they will work?

You guys have definitely given me a much better understanding of these coils. I came in a few days ago with practically no understanding whatsoever, so I am very grateful! Hopefully this is the first coil of many wink

Cheers,
Matt
Re: First SSTC design - Need some critique
Dr. Dark Current, Mon Jun 30 2014, 08:37AM

I'd say 10x the bridge output voltage is way too low. More likely 30x. For a peak primary Q of 10 (which is a relatively common value for a DRSSTC), the peak voltage already rings up to 13 times the bridge output voltage. And the DC rating of the caps should really be at least 2 times this.
Re: First SSTC design - Need some critique
Steve Conner, Mon Jun 30 2014, 09:59AM

In a DRSSTC you can limit the voltage across the tank capacitor to whatever you want by setting the current limiter appropriately. The question is then whether the coil will make the size of spark you wanted at that level of primary current. smile
Re: First SSTC design - Need some critique
DerStrom8, Mon Jun 30 2014, 11:44AM

Thanks guys, I guess I'll keep looking then.

Cheers,
Matt

SEARCH UPDATE:

Back in the day when I was building a SGTC I read that doorknob capacitors were a great choice. I am assuming the same goes for DRSSTCs? I found the following capacitors on ebay that the seller claims to be a "doorknob capacitor": Link2
I will be driving my coil from mains adjusted by a variac and rectified, so I would expect between 0 and 170VDC on the primary (ignoring ringup). Multiply that by 30 and I get 5100V. The caps in the link, if paralleled, will give me 20nF rated for 5kv. I'm thinking that would be close enough? I'm also not sure about the material, whether it has a high dissipation factor or not. I'm asking because I know that doorknob capacitors were recommended for Tesla Coils and this Russian capacitor is supposedly a type of "doorknob" capacitor.
Re: First SSTC design - Need some critique
Dr. Dark Current, Mon Jun 30 2014, 04:34PM

Dissipation factor: <0.001
Should work OK. However, you can't use other ordinary ceramic doorknob caps, as they are high loss ceramic.
Re: First SSTC design - Need some critique
DerStrom8, Mon Jun 30 2014, 04:55PM

Dr. Dark Current wrote ...

Dissipation factor: <0.001
Should work OK. However, you can't use other ordinary ceramic doorknob caps, as they are high loss ceramic.

DOH! Don't know how I missed that, it's right there at the top of the specs tongue

Thanks for pointing that out!

Matt
Re: First SSTC design - Need some critique
DerStrom8, Wed Jul 02 2014, 08:11PM

Hi folks,

It's been 48 hours, so according to the ToS I can post again with new info smile

I pulled a few transformer cores out of an old ATX power supply and a large amplifier that I think are just perfect for this project. The two identical ones are from the amp, and the other one is from the PSU:

Link2
Link2

I had a long ethernet cable just lying around that I picked up somewhere for a couple bucks so I decided I would salvage the neatly-twisted pairs of wires from it. The current transformer is a 1:1024 one made by following the instructions provided in this video: Link2

Here's the finished (though not soldered/heat shrunk yet) product:

Link2

The GDT was created using the last core. 1 8-turn coil (the copper-colored wire) was used for the primary, and two pairs of wire (green) were used for each secondary. The secondaries are out-of-phase with each other. Together, they will drive each of the 4 IGBTs:

Link2

I recently drew up an updated version of the schematic, this time using Eagle. Eagle, unfortunately, did not have a model for the UCC27425, so in order to represent it I used the 4420 and 4429 models along with some AND/NAND gates:

Link2

Here are the specs I have (calculated) so far:

Resonant frequency: 237.76 kHz
Secondary height: 20 in.
Secondary diameter: 4.5 in.
Secondary wire gauge: 26 AWG
Secondary # of turns: 1257 turns
Topload minor diameter: 3 in.
Topload major diameter: 10 in.
Primary diameter: 5.5 in.
Primary wire gauge: 12 AWG
Primary # of turns: ~10 turns adjustable
Primary inductance: 22.404 uH
Tank capacitor(s): 2x 10nF, 5kv paralleled
Transistors: 4x HGTG20N60A4D (600V 70A@25C w/ built-in flyback diode)
GDT: Pentifilar coil, 8 turns each. The two pairs of secondaries are out of phase with each other
Feedback coil: 1:1024 (16 turns of paired wires connected in series, passed through second (identical) transformer. This gives 32 windings on each transformer, 32*32 = 1024 multiplier.


Does it look like I'm (finally) on the right track? I'm on vacation at the moment but I will be heading back to work soon, so I will probably not be able to complete this Tesla coil for another month or two.

Thanks again everyone for your help. I've definitely learned a lot even in this short period of time.

Cheers,
matt
Re: First SSTC design - Need some critique
Sigurthr, Wed Jul 02 2014, 10:10PM

One quick note; in my experience anything less than 10 turns on a GDT will have poor results. I always had excellent results with 14-16turns, and I've had several customers have to remake their GDT when their coils didn't operate well to match.
Re: First SSTC design - Need some critique
DerStrom8, Wed Jul 02 2014, 10:41PM

Sigurthr wrote ...

One quick note; in my experience anything less than 10 turns on a GDT will have poor results. I always had excellent results with 14-16turns, and I've had several customers have to remake their GDT when their coils didn't operate well to match.


Good note, thanks very much. I kept it at 8 turns simply due to the size of the core, but if I can find a larger one I very well may increase the number of turns. Thanks a lot for the heads-up. I found several designs that only used 8 turns, so I assumed it would be ok, but I will definitely keep this in mind. I have plenty of left over wire (the ethernet cable was 25-foot, I think) so I definitely don't lack the materials wink

Cheers,
Matt
Re: First SSTC design - Need some critique
loneoceans, Wed Jul 02 2014, 11:06PM

You can't just make a GDT by winding any number of turns on any core. It depends on a variety of factors - what frequency are you running the coil at, what sort of power etc. There is no rule of thumb for number of turns either, but if you have too many turns [corrected: too few turns], your core will saturate! You would actually want to use the minimum number of turns without saturating the core. This all depends on the characteristics of your toroid material etc. Finally, I'm pretty sure most power supply toroids will not work especially if they are powered iron. You would want a ferrite core with a high permeability.

If you don't have the datasheet for the cores (which it looks like you don't), you can do a quick test with a scope and a signal generator. Send a square wave at the expected running freq in the primary, and see if you get a suitable output (which looks more or less square out - it will be very obvious that something's going on if you try that on an iron core). Most cores in power supplies will be too lossy at tesla coil frequencies so you cannot use those. Lastly, it looks like you separated your primary and secondary windings for your GDT into sections. That will probably work fine but I would twist them all together instead to reduce the leakage inductance.

[Edit] you can't use iron cores for your feedback either, so make sure they're the right material. If you're going to buy toroids, just make sure they're of the right material (AL value of around 4000, 5000 or so). I'd recommend buying a few so you can use them to make other gdts or current transformers. :)
Re: First SSTC design - Need some critique
DerStrom8, Wed Jul 02 2014, 11:17PM

loneoceans wrote ...

You can't just make a GDT by winding any number of turns on any core. It depends on a variety of factors - what frequency are you running the coil at, what sort of power etc. There is no rule of thumb for number of turns either, but if you have too many turns, the core saturates. You would actually want to use the minimum number of turns without saturating the core. This all depends on the characteristics of your toroid material etc. Finally, I'm pretty sure most power supply toroids will probably not work especially if they are powered iron. You would want a ferrite core with a high permeability.

If you don't have the datasheet for the cores which it looks like you don't, you can do a quick test with a scope and a signal generator. Send a square wave at the expected running freq in the primary, and see if you get a suitable output. Most cores in power supplies will be too lossy at tesla coil frequencies so you cannot use those. Lastly, it looks like you separated your primary and secondary windings for your GDT into sections. That will probably work fine but I would twist them all together instead to reduce the leakage inductance.

I knew that some cores (namely powdered iron) would not be effective in Tesla Coil operation. I came across something once, though, saying that a core that almost looks ceramic is the type I would want, which is exactly what I have. Unfortunately I don't have the datasheet but I will certainly do some testing.

As for winding the coils themselves, would you recommend I wind one over another, instead of winding them into sections? I imagine that would make twisting the leads together when finished.

Let me run some tests on this core and I'll get back to you.

Regards,
Matt

EDIT:

Unfortunately my oscilloscopes and signal generators are all quite old and they don't run very well at high (>10 kHz) frequencies. I could test them at work, but I won't be back there until next week. Is there a well-known source for gate drive transformer cores that is popular among the Tesla coil community? In the mean time, I'll keep looking.

SECOND EDIT:

I've been looking on mag-inc.com at their model ZJ42508TC (link downloads PDF datasheet): Link2
It has a permeability of 5000, and an AL value of 4,830 nH/T^2, which I believe fits in with your recommendations. I just need to be sure it's the right material ("J") and that it will not have significant losses at ~240 kHz.
Re: First SSTC design - Need some critique
Antonio, Thu Jul 03 2014, 01:18AM

loneoceans wrote ...

You can't just make a GDT by winding any number of turns on any core. It depends on a variety of factors - what frequency are you running the coil at, what sort of power etc. There is no rule of thumb for number of turns either, but if you have too many turns, your core will saturate! You would actually want to use the minimum number of turns without saturating the core. This all depends on the characteristics of your toroid material etc. Finally, I'm pretty sure most power supply toroids will not work especially if they are powered iron. You would want a ferrite core with a high permeability.

It's correct to say that you want to use the minimum number of turns that does not saturate the core, or a bit more if some extra leakage inductance can be tolerated.
The core does not saturate with excessive number of turns. It saturates with too few turns. Saturation occurs when the magnetic flux density B in the core becomes too high. The maximum B is proportional to the input voltage and inversely proportional to the frequency and to the number of turns. Too few turns also decrease the primary magnetizing inductance, increasing the input current that the driver must provide just to keep the input voltage waveform even without load.
Too many turns increase the leakage inductance, or equivalent series inductance of the transformer, and the series resistance too. This is problematic with the high input capacitance of the IGBTs that the GDT drives.
Re: First SSTC design - Need some critique
Sigurthr, Thu Jul 03 2014, 01:39AM

I should note I use ~14,000AL cores.

Yup too few turns result in saturation, not too many.
Re: First SSTC design - Need some critique
DerStrom8, Thu Jul 03 2014, 01:50AM

Sigurthr wrote ...

I should note I use ~14,000AL cores.


Well, the AL value of the cores I posted is nowhere near 14,000, but I am curious if they would work anyway. If I'm lucky I may be able to get some of those cores for free, so I would like to try different options. Another core on the same site is the ZW42508TC (again, link opens PDF datasheet): Link2

It has a permeability of 10,000 and is 9660AL. What would you recommend? Again, this is my first SSTC so I'm not sure what all to look for to find appropriate cores for a GDT.

Cheers,
Matt
Re: First SSTC design - Need some critique
Sigurthr, Thu Jul 03 2014, 02:59AM

The first SSTC I made used a 3300AL core and worked at 600khz. After I got a scope and saw the gate waveforms I switched to the high AL cores, which when nothing else was changed resulted in clean gate drive. Just my anecdotal evidence.
Re: First SSTC design - Need some critique
DerStrom8, Thu Jul 03 2014, 03:41AM

Sigurthr wrote ...

The first SSTC I made used a 3300AL core and worked at 600khz. After I got a scope and saw the gate waveforms I switched to the high AL cores, which when nothing else was changed resulted in clean gate drive. Just my anecdotal evidence.

That makes sense. I think I asked it earlier but nobody responded--is there a favorite source of GDT cores among the Tesla coil builder community? I've checked a variety of websites but have yet to find one that has cores with AL values of 10,000 or greater.
Re: First SSTC design - Need some critique
Sigurthr, Thu Jul 03 2014, 04:08AM

On my site (sigurthrenterprises.com) in the USSTCC data file is a Bill of Materials which contains the digikey part number for the cores I use. I'd get it for you myself but I'm replying using my phone and cannot download the files on it.
Re: First SSTC design - Need some critique
loneoceans, Thu Jul 03 2014, 04:49AM

Antonio wrote ...

It's correct to say that you want to use the minimum number of turns that does not saturate the core, or a bit more if some extra leakage inductance can be tolerated.
The core does not saturate with excessive number of turns. It saturates with too few turns. Saturation occurs when the magnetic flux density B in the core becomes too high. The maximum B is proportional to the input voltage and inversely proportional to the frequency and to the number of turns. Too few turns also decrease the primary magnetizing inductance, increasing the input current that the driver must provide just to keep the input voltage waveform even without load.
Too many turns increase the leakage inductance, or equivalent series inductance of the transformer, and the series resistance too. This is problematic with the high input capacitance of the IGBTs that the GDT drives.


That's right! I got them mixed up the other way. amazed The flux density is volts per (area * freq * number of turns), so indeed use the minimum number not to saturate. People used to buy electronics goldmine cores for really low prices. I don't think they have them anymore, but I think easternvoltageresearch sells ferrite cores of the 77/78 type material from fair-rite.
Re: First SSTC design - Need some critique
DerStrom8, Thu Jul 03 2014, 12:56PM

Sigurthr wrote ...

On my site (sigurthrenterprises.com) in the USSTCC data file is a Bill of Materials which contains the digikey part number for the cores I use. I'd get it for you myself but I'm replying using my phone and cannot download the files on it.

Ah, many thanks! Found just what I was looking for, at a price I was expecting. I'm thinking I'll pick up 4 for now, since I'm rapidly closing in on the budget for this coil, but I'll need to remember where to find your data file for the future. I was looking on DigiKey the other day for cores but couldn't seem to find any suitable ones. This is exactly what I was looking for though!

loneoceans wrote ...

People used to buy electronics goldmine cores for really low prices. I don't think they have them anymore, but I think easternvoltageresearch sells ferrite cores of the 77/78 type material from fair-rite.

I checked easternvoltageresearch and the cores I found (that cost less than the ones on digikey) seem to have a low (2000) permeability. I'm thinking I'll just jump on the digikey ones for now.

Thanks all, I'll post back when I have more updates.
Regards,
Matt

UPDATE:
Just thought I'd post the images of my secondary coil and topload. Both are sort of lashed together, at the moment. I wound the primary several years ago when I was building my SGTC. The topload is 3" diameter aluminum dryer duct, bent into a toroid with an OD of around 13" (actually 12.75"). That was the tightest I could bend it without damaging the duct. This gives me a resonant frequency of around 218kHz. I am hoping the topload isn't too large. If it is, I'm sure I could figure something else out. I also plan to fully wrap the entire toroid in aluminum tape to make it look better, and to improve conduction. So I will not be using it half-and-half, as it is now.

Link2
Re: First SSTC design - Need some critique
DerStrom8, Sun Jul 06 2014, 08:17PM

Hi guys,

Another couple of days have gone by and I have a another question:

First, must any special considerations be taken into account for the bridge rectifier supplying power to the H-Bridge? For example, I plan to allow no more than 120VRMS into the bridge. It will be controlled by a Variac. What information will I need to know before choosing a rectifier? I currently have an RBV-1306 that I pulled from an old amplifier. It's datasheet can be found here: Link2

According to the document, this bridge rectifier is designed for 600V and 13A (with a heatsink, which I do have). I'm thinking this should be fine, but I'd like to verify it first before I release its magic smoke tongue
Re: First SSTC design - Need some critique
Sigurthr, Mon Jul 07 2014, 03:42AM

You need to know what peak/RMS current to expect. I get a good approximation by determining the reactance of the primary at the resonant frequency of the secondary. Plug this in to get an approximation of the peak/RMS current. Use the rectified and smoothed DC Bus voltage if you're going to run CW on smoothed DC, but you can use the RMS voltage if you're not going to run CW or aren't using a smoothing cap (or are using small dc blocking caps on a half bridge). Remember that it is just an estimation, but it's always served me well.
Re: First SSTC design - Need some critique
DerStrom8, Mon Jul 07 2014, 11:38AM

Sigurthr wrote ...

You need to know what peak/RMS current to expect. I get a good approximation by determining the reactance of the primary at the resonant frequency of the secondary. Plug this in to get an approximation of the peak/RMS current. Use the rectified and smoothed DC Bus voltage if you're going to run CW on smoothed DC, but you can use the RMS voltage if you're not going to run CW or aren't using a smoothing cap (or are using small dc blocking caps on a half bridge). Remember that it is just an estimation, but it's always served me well.

I'm a bit confused. Isn't reactance at its peak at the resonant frequency? So wouldn't that give me the lowest value of the current, not the highest?

EDIT: Oops, I'm thinking the reactance of the primary itself, not the primary coil/capacitor together

SECOND EDIT: I've done the math but I'm not sure I did it correctly. It should be simple, but my current seems much higher than I expected -

X_l = 2*pi*f*L. My primary L = 27.805uH and resonant frequency of the secondary is 217.37kHz. Thus the reactance (X_l) = 37.975 ohms

X_c = 1/(2*pi*f*C). My capacitor C = 20nF. Thus the reactance is 36.609 ohms

I_max = V_rms/(sqrt(R^2+(X_l - X_c)^2))

*NOTE* I will not be running in CW mode

R of primary is as follows:
Gauge: 12 (AWG)
Length: 15.55 feet
Thus total resistance of primary R = 0.025 ohms

Therefore, I_max = 120vrms/(sqrt(0.025^2 + (37.975 - 36.609)^2)) = 87.83 Amps.

Does that seem a little high to you guys? Did I do my math correctly?

Thanks,
Matt
Re: First SSTC design - Need some critique
Sigurthr, Mon Jul 07 2014, 10:51PM

I thought you said you'd be making a SSTC not a DR?

There's no primary cap in a SSTC so your primary impedance is nonzero and is thus the main determining current limiter for a loaded SSTC. (Coupling factor affects loading).

For a DR the calculations are much more complex.

Edit: the resonant circulating currents see only resistive losses and switching losses for an unloaded coil, so as your peak primary voltage rises so does the peak primary current. This is why ZCS and ZVS switching are so important. This current figure is only for your switches though, your rectifier doesn't see circulating currents.
Re: First SSTC design - Need some critique
DerStrom8, Mon Jul 07 2014, 11:40PM

Sigurthr wrote ...

I thought you said you'd be making a SSTC not a DR?

There's no primary cap in a SSTC so your primary impedance is nonzero and is thus the main determining current limiter for a loaded SSTC. (Coupling factor affects loading).

For a DR the calculations are much more complex.

Edit: the resonant circulating currents see only resistive losses and switching losses for an unloaded coil, so as your peak primary voltage rises so does the peak primary current. This is why ZCS and ZVS switching are so important. This current figure is only for your switches though, your rectifier doesn't see circulating currents.

I think someone asked me that a couple of times already. I was originally planning on building a simple ISSTC, but since I have most of the parts already, I decided to just go ahead and try for a DRSSTC. That is why I'm using a primary feedback transformer, which I mentioned in a previous post. I also talked about tank capacitors for a while, which I wouldn't need if I was building a regular SSTC wink

By the way, the new ferrite cores arrived today so I was able to wind a new GDT. I am quite happy with it too--I was able to borrow a better scope for testing. Here are a few pictures:

The GDT:
Link2

GDT primary and two secondary waveforms taken at 273kHz, the resonant frequency of my coil. (Sorry for the lack of color--apparently the scope I used wasn't capable of saving to a color image):
Link2

And while I was at it, I decided to test the old primary feedback transformer I had wound (on what we decided were probably bad cores). Guess what? You guys were right--output was absolute garbage:
Link2

So I decided to re-wind it using the new cores I received:
Link2

And tested at 273kHz:
Link2

Thinking I should have tested it using a sine wave though, not a square wave. Am I correct? What is the most common method of testing primary feedback current transformers?
Re: First SSTC design - Need some critique
Sigurthr, Tue Jul 08 2014, 01:02AM

Square wave voltage through an inductor causes a sine wave current to flow. Sorry I missed the decision to go through with a DR coil, there was a bunch of back and forth on it earlier, lol.

Re: First SSTC design - Need some critique
DerStrom8, Tue Jul 08 2014, 02:28AM

Sigurthr wrote ...

Square wave voltage through an inductor causes a sine wave current to flow. Sorry I missed the decision to go through with a DR coil, there was a bunch of back and forth on it earlier, lol.



Yes, that was my fault--I couldn't make up my mind at first, so I'm sure I confused a few people! angry cheesey

So the waveform looks good then? That would be great news!

I am very pleased with how the GDT turned out, except I goofed a bit with one of the secondaries, and there are 1-2 fewer turns. If it causes too much of a problem I can re-wind just that secondary.

So determining the necessary current ratings for the bridge rectifier--Are you saying the one I mentioned earlier would be sufficient, provided it is not run continuously (which I'm not planning to do anyway)?

Now, I think I read somewhere that it is not recommended to exceed 90% duty cycle unless you design it to run in CW mode. Can anyone verify this? It makes complete sense to me, and I plan to implement a limit on the software-side (Arduino).

I'm also finishing up the MIDI processing, so I now have manual (freq/duty cycle adjust) and MIDI interrupter modes. I'll post a simulation or a video at some point in the near future.

Cheers,
Matt
Re: First SSTC design - Need some critique
Uspring, Tue Jul 08 2014, 07:51AM

DerStrom8 wrote:
SECOND EDIT: I've done the math but I'm not sure I did it correctly. It should be simple, but my current seems much higher than I expected -
Your math is mostly correct within the model you assume. A series tank, like your primary, has a reactance of zero at its resonance, so the current will have a sharp peak around there. The values you calculate depend very much on the precision of the values you put in. Depending on your feedback scheme you might not be running at exactly the secondaries resonant frequency, so the kind of math you used will likely result in values way off.

*NOTE* I will not be running in CW mode
If you disregard the effect of the secondary, your primary tank will ramp up its current in a linear fashion. The primary voltage will increase by 4*Vbus each cycle, Vbus being the amplitude of the voltage you feed into the tank. A short burst will not lead to infinite currents. The current will also be limited by the primary copper resistance, possibly at some very high values.

Primary current is also limited by secondary loading, particularly when arcs break out. This has been discussed here: Link2
The effect is, that secondary loading will induce a resistance in the primary tank, reducing its Q significantly. That also causes a reduction of primary current.
Re: First SSTC design - Need some critique
DerStrom8, Tue Jul 08 2014, 12:21PM

Uspring wrote ...

DerStrom8 wrote:
SECOND EDIT: I've done the math but I'm not sure I did it correctly. It should be simple, but my current seems much higher than I expected -
Your math is mostly correct within the model you assume. A series tank, like your primary, has a reactance of zero at its resonance, so the current will have a sharp peak around there. The values you calculate depend very much on the precision of the values you put in. Depending on your feedback scheme you might not be running at exactly the secondaries resonant frequency, so the kind of math you used will likely result in values way off.

*NOTE* I will not be running in CW mode
If you disregard the effect of the secondary, your primary tank will ramp up its current in a linear fashion. The primary voltage will increase by 4*Vbus each cycle, Vbus being the amplitude of the voltage you feed into the tank. A short burst will not lead to infinite currents. The current will also be limited by the primary copper resistance, possibly at some very high values.

Primary current is also limited by secondary loading, particularly when arcs break out. This has been discussed here: Link2
The effect is, that secondary loading will induce a resistance in the primary tank, reducing its Q significantly. That also causes a reduction of primary current.


This is very good to know. I was trying to figure out how my primary would handle 87 amps, but it sounds like it's not likely going to see that, at least not for long periods of time.

I'm not sure I ever posted an updated JavaTC output, so here it is. The primary is still a bit off, and I'll have to fiddle with it a bit to match the resonant frequency, but it's somewhat close so far.

Link2
Re: First SSTC design - Need some critique
Uspring, Tue Jul 08 2014, 02:02PM

Don't waste too much time on getting the primary tuned exactly to the secondary. The arc has a considerable capacitance and will lower secondary resonance. Generally the primary should be tuned maybe 10% lower for best results. Initially start off with approximately equal frequencies and then experiment with lower primary fs.

Re: First SSTC design - Need some critique
DerStrom8, Tue Jul 08 2014, 04:39PM

Uspring wrote ...

Don't waste too much time on getting the primary tuned exactly to the secondary. The arc has a considerable capacitance and will lower secondary resonance. Generally the primary should be tuned maybe 10% lower for best results. Initially start off with approximately equal frequencies and then experiment with lower primary fs.



Good to know, thanks!

I'll post back here when I make more progress. I've made some modifications to my Arduino interrupter and will soon post the project. I just have to tweak a few more things first.

Regards,
Matt

UPDATE:

My capacitors and IGBTs arrived today, so I'm just about ready to start construction. Unfortunately the perfboard and some of the other materials are still at my home in Vermont, and I'm currently living in Boston for work. I won't be able to retrieve the until next month.

In the mean time, I have made progress on my interrupter. It's based around an Arduino, though the Arduino is really only used for the MIDI options and to select modes. There are 4 modes:

Mode 0 - Output off
Mode 1 - Manual. This mode uses a 555 timer and a 393 comparator to generate a square wave with completely independent frequency and duty cycle adjustment.
Mode 2 - USB MIDI. This mode takes MIDI that is played over a MIDI connection from a computer, sent over USB to the Arduino, and converts it to a square wave that is usable as an interrupter output. This mode requires extra software, which I may cover in a future post.
Mode 3 - External MIDI. This mode takes MIDI signals directly from an instrument and converts it (using some external circuitry) to a serial signal that is read by the Arduino. The Arduino then converts it to a square wave for the interrupter. This mode is not yet functional.

Here's a photo of the prototyped setup:
Link2

Eventually this will all be going onto a proto-shield that can mount directly to the Arduino, making it much neater and more portable.

Just thought I'd update you all on the progress!
Re: First SSTC design - Need some critique
DerStrom8, Mon Jul 14 2014, 07:42PM

Hi guys,

I finally got around to breadboarding the entire setup (minus the actual Tesla coil) and have noticed the UCC27425 gets quite hot. I am using a 1uF DC blocking cap in series with the output, but I'm wondering if 1uF isn't enough?

Once again, here's my circuit: Link2

Currently I have a DC power supply set to 12v connected to the UCC27425 power rails, as well as between the + and - rails of the bridge. I am simulating feedback with a function generator set to produce a 237kHz square wave. I replaced the primary and tank capacitor with a variable resistor set to 470k, though I'm wondering if I should use an inductor instead.

I get a square wave (though it has a bit of ringing) on the output of the H-bridge.

Any thoughts as to what may be happening to the 27425 to cause it to heat up so much?

Also, when connected as shown in the schematic, the interrupter has no effect on the output of the 27425.

As always, your help is appreciated!

Regards,
Matt
Re: First SSTC design - Need some critique
Dr. Dark Current, Mon Jul 14 2014, 09:22PM

It will get hot when driving a bridge of transistor at hundreds of kHz... tongue

You can try decreasing the dissipation by connecting a resistor in series with its output. This will slow down the transitions somewhat, but you might find a compromise.
Re: First SSTC design - Need some critique
loneoceans, Mon Jul 14 2014, 09:31PM

Indeed especially seeing how you're driving a full bridge with just one UCC. Might be a good idea to simply use a UCC27322/21 pair combination. Those are 9A drivers, instead of the 4A one you're using now. Not much changes to the circuit either.
Re: First SSTC design - Need some critique
DerStrom8, Mon Jul 14 2014, 09:35PM

Dr. Dark Current wrote ...

It will get hot when driving a bridge of transistor at hundreds of kHz... tongue

You can try decreasing the dissipation by connecting a resistor in series with its output. This will slow down the transitions somewhat, but you might find a compromise.

I was thinking that would be the case. I know the 555 even gets warm when running at high frequencies.

Just checking, did you see my edit to my previous post? The interrupter doesn't seem to be doing anything to the output. If I am not mistaken, the enable inputs of the 27425 are pulled-up to Vcc, I'm wondering if that may be causing it to run continuously. In which case, how is the enable even useful? The internal schematic can be found here: Link2

loneoceans wrote ...

Indeed especially seeing how you're driving a full bridge with just one UCC. Might be a good idea to simply use a UCC27322/21 pair combination. Those are 9A drivers, instead of the 4A one you're using now. Not much changes to the circuit either.

That's a good point. I have a TC4420 and a TC4429 for this reason exactly--they are rated at 6A each--but I would need some logic gates (AND and NAND) in order to get the enable option.

Now, here's another (probably stupid) question: Would there be any possibility to parallel multiple 27425s? I have never seen it done and I'm not sure if it's even plausible, but thought I'd ask anyway.

Thanks,
Matt
Re: First SSTC design - Need some critique
Dr. Dark Current, Mon Jul 14 2014, 09:51PM

What are you using for the interrupter? It should have a push-pull (double ended) output.

You can parallel the 27425s.
Re: First SSTC design - Need some critique
DerStrom8, Mon Jul 14 2014, 09:59PM

Dr. Dark Current wrote ...

What are you using for the interrupter? It should have a push-pull (double ended) output.

Ahh, well that would explain it. I've been using a simple square wave (0-5v) output from an arduino. So you're saying this wouldn't work? It would need to be +/- 5v?
Re: First SSTC design - Need some critique
Sigurthr, Mon Jul 14 2014, 10:24PM

You can use a simple single ended square wave just fine, you need a pull down resistor or a preceding stage which can sink current at low impedance. The UCC37322/21 pair have 100k internal pull ups so it isn't much of an issue to sink using internal output impedance of most logic chips, but a pull down resistor in the 1-10k range should work universally well. I don't remember the threshold voltage it needs for a HIGH on the enable line, but 4.5V is plenty I'm sure.

As above, that single chip will get hot driving a full bridge at low RF, especially running CW. On higher frequency coils I've made I've even paralleled up 2 each of the 9A drivers for just a half bridge.
Re: First SSTC design - Need some critique
Dr. Dark Current, Mon Jul 14 2014, 10:30PM

Well I don't like using pull up/down resistors in a noisy TC environment. A few kOhm is OK, but 100k is not.
Re: First SSTC design - Need some critique
DerStrom8, Mon Jul 14 2014, 10:46PM

Dr. Dark Current wrote ...

Well I don't like using pull up/down resistors in a noisy TC environment. A few kOhm is OK, but 100k is not.

I believe he was saying that the built-in pull-up (as shown in the internal schematic that I posted a link to earlier) was 100k, and that a pull-down resistor of 1k would work just fine. I may end up doing that.

I am pretty well convinced that I'll be paralleling two 27425s, since that is what I have.

Thanks guys, you just simplified things. Just to clarify though, the interrupter didn't do anything to the output, but adding a pull-down resistor will likely solve the problem? I was wondering if that would help when I was testing earlier.

Cheers,
Matt
Re: First SSTC design - Need some critique
Sigurthr, Mon Jul 14 2014, 11:32PM

Right, I am saying the chips have a built in internal 100k pull up resistor, so if you use a 1k pull down you are forming a voltage divider which will drop the enable pin voltage during the interrupter LOW state voltage to 1% of Vcc. This is only needed when the output impedance of the stage preceding the UCC chip doesn't have a low enough output impedance or can't sink enough current to bring the steady state voltage of the enable pin down below switching transition threshold. When the preceding stage can't bring the enable pin LOW after a HIGH you get a floating input, which due to the internal pull up the chip sees as a HIGH.
Re: First SSTC design - Need some critique
DerStrom8, Sun Jul 20 2014, 05:28PM

Hi guys,

This is a bit off-topic (but only slightly), as it is about a half-bridge instead of the full-bridge that I'm using to drive my coil, but I just picked up the following IGBT brick at the MIT electronics flea market:

Link2

Mine is actually the 100 D, but I can't seem to find the specific datasheet for it. This is the closest I could find.

My question is, would there be any major concerns about using this in a Tesla coil application? I'm a bit concerned about the recovery speed of the reverse diode, but I wanted to check with the experts to see what you guys think.

2ag66x0
23sht7t
Re: First SSTC design - Need some critique
dexter, Sun Jul 20 2014, 08:07PM

from datasheet
the gate capacitance is quite high adding a bit of complexity to the gate driving circuits
the Switching Characteristics are not that bad so i think those IGBT's could work up to 100-150kHz
the recovery speed of the reverse diode is ok for the above frequencies

anyway i'm fairly new to this so i might be wrong...
Re: First SSTC design - Need some critique
DerStrom8, Sun Jul 20 2014, 08:43PM

dexter wrote ...

from datasheet
the gate capacitance is quite high adding a bit of complexity to the gate driving circuits
the Switching Characteristics are not that bad so i think those IGBT's could work up to 100-150kHz

Hi dexter,

You actually just strengthened my point, as my TC has a resonant frequency of around 240kHz. I'm thinking I posted the specs earlier in the thread, in case you'd like to see them. I appreciate your feedback!

By the way guys, I constructed a very simple quick-replace system for the TO-247 IGBTs in case one blows. I'm using some MSTB connectors that have the socket on the top and the adjustment screws on the side. The bottom is supposed to be plugged into a header, but since I don't have one I decided to use some 1.5mm diameter tubing in place of the header "prongs". I was then able to plug standard headers into the tubing, which allows the whole thing to be mounted to the perfboard.

This is not ideal, as the connectors are only rated for 10A and the headers are fairly wimpy. I'm thinking that it should be ok though, considering the headers are connected using the tubing, and the current will be pulsed. Here are a few pics of the connectors and the setup:

2qkhrt2
Qranf8
Fu3wjr

I'm thinking I'll probably shorten the tubing, as it really doesn't need to be that long.

Regards,
Matt

EDIT: I have also had a growing concern regarding whether my IGBTs will be able to handle the current. In case you don't feel like reading back, I found a good price on a bunch of HGTG20N60A4Ds. The datasheet says they should be good for 600V, 280A pulsed. That alone concerns me, as I am not sure how to calculate the primary current that they will be seeing--I think one of you mentioned that the calculation for that will be quite complicated. If someone could help me out with that, I would appreciate it. Secondly, I am not sure what the maximum allowable duty cycle will be, or how to calculate it. I think to calculate the maximum allowable duty cycle will require the current calculations, so without knowing the current there's not much more I can do.
Re: First SSTC design - Need some critique
dexter, Mon Jul 21 2014, 07:03AM

so you are now making a DRSSTC....

quick-replace system for TO-247 IGBTs is not something new but i will try to reduce any extra joints as possible, use some of these:
DSC03426

1405926012 42796 FT164145 Dsc03426

but i doubt this could handle the currents in a DRSSTC setup

as for the peak current people have built DRSSTC with just 100A tank current
Re: First SSTC design - Need some critique
DerStrom8, Mon Jul 21 2014, 01:07PM

dexter wrote ...

so you are now making a DRSSTC....

quick-replace system for TO-247 IGBTs is not something new but i will try to reduce any extra joints as possible, use some of these:

1405926012 42796 FT164145 Dsc03426

but i doubt this could handle the currents in a DRSSTC setup

as for the peak current people have built DRSSTC with just 100A tank current

I used the connectors shown because of how the IGBTs will be mounted, both to the heat sink and to the board. Once again I will be shortening the tubing, so it will really just be the connector and the header. It's completely experimental, and I do have a heavy-duty terminal block if I need to use that instead.

Sure people have built 100A tank circuits, but my point is that mine is already designed--I have all the components chosen already and need to calculate the expected current. At resonance the reactance of the tank circuit is equal to zero, if I am not mistaken, so I would have to find the voltage that the primary rings up to and divide it by the total resistance of the tank circuit, am I correct? And yes, I decided quite a while ago that I was building a DRSSTC tongue

By the way folks, here's a simulation video of my Arduino-based interrupter. It's still very much a work in progress, but at least it is functional:



The interrupter has four modes:

Mode 0: Output off
Mode 1: Manual -- Arduino switches power to a 555 timer and a 393 comparator to allow independent frequency and duty cycle control
Mode 2: PC MIDI input -- Arduino accepts MIDI signal over USB and converts it to a square wave. Will probably switch to a MEGA so that I can include a channel select with readout, or even better an LCD.
Mode 3: External MIDI input -- Not yet functional, but this mode will accept a MIDI signal directly from a musical instrument.

Sorry for the delays in the video, it's caused by Proteus loading my CPU. I also apologize for the crowded screen--Most of the windows do not have the option to adjust their size.



FURTHER EDITS:

Thanks to a sticky Mads just posted, I believe I found the answer to the current problem. The thread I am referring to is this one: Link2

Uspring wrote ...

Basically you'll add the switching voltage to your MMC voltage every time you switch. In detail:
With a mains voltage of 120V and a half bridge you switch between -170V and +170V. Initially you start off with 0V. When voltage is first applied, the MMC voltage will rise to 170V after one half cycle, i.e. 3us. Then you switch input to -170V. After 3us MMC voltage will be 170V + 340V. You have added the switching amplitude (340V) to the initial voltage. After another 3us MMC voltage wil be 170V + 2*340V and so on.

The MMC voltage determines the current:
I = V / (2* Pi * Lpri * fres)
with primary fres. For 21uH and 160kHz, 100A will be reached, when the MMC voltage is 2100V, i.e. after about 6 half cycles or about 18us.

This is very much an upper limit for the current. Losses in the primary tank and even more the loading due to the secondary will limit the current. If you have a scope, I'd monitor it and go from there.
I believe these fets can stand much more current for the short burst times you are aiming at.

I will be running from full-wave rectified mains (120VAC), so most of the values used in the example match what I will be using. The only differences are my primary inductance (mine is 27.8uH) and fres (mine is around 217kHz). Therefore my max current should be (roughly):

Mcgp3r

How does this look?

Thanks guys!
Re: First SSTC design - Need some critique
Sigurthr, Tue Jul 22 2014, 01:06AM

Note that in that thread with Uspring's reply that you quoted, he made the mistake that a half bridge switches between +170 and -170, it does not. A FULL bridge does. A Half bridge on rectified 120V mains switches +85 and -85 as the capacitive divider creates a +85v to ground mid point that the primary is tied to.
Re: First SSTC design - Need some critique
DerStrom8, Tue Jul 22 2014, 01:22AM

Sigurthr wrote ...

Note that in that thread with Uspring's reply that you quoted, he made the mistake that a half bridge switches between +170 and -170, it does not. A FULL bridge does. A Half bridge on rectified 120V mains switches +85 and -85 as the capacitive divider creates a +85v to ground mid point that the primary is tied to.

Hi Sigurthr,

Yep, I did notice that. And since my circuit uses a full bridge, I used the original formula he provided.

I gotta say, that thread did clear up a bit, so thanks for that wink

Cheers,
Matt
Re: First SSTC design - Need some critique
DerStrom8, Sat Jul 26 2014, 04:39PM

Hi guys,

I read somewhere that one should not run a DRSSTC at a duty cycle higher than 10%, unless specifically designed otherwise. Is this true? 10% does seem a bit low, but it would make sense, considering the amount of current being delivered to the primary.

Thanks guys,
Matt
Re: First SSTC design - Need some critique
Mads Barnkob, Sat Jul 26 2014, 07:48PM

You should not run a DRSSTC above 500uS on-time at most, it is normal to run between 50 to 300uS on-time depending on coil size.

That is far far less than 10% duty cycle.
Re: First SSTC design - Need some critique
DerStrom8, Sat Jul 26 2014, 08:06PM

Mads Barnkob wrote ...

You should not run a DRSSTC above 500uS on-time at most, it is normal to run between 50 to 300uS on-time depending on coil size.

That is far far less than 10% duty cycle.

The 10% figure was an upper limit, so that makes sense. It looks like I will have to reconsider my interrupter, though. I was planning on playing music through the coil, possibly using the tone library for Arduino. Those tones are played at a 50% duty cycle, which means an A4 tone (440Hz) would have an on-time of around 1.14nS. I guess if I plan to use the tone library, it would be best if I avoid playing notes at 1kHz or lower? Either that or find a way to change the duty cycle of the tone. How do other people with singing DRSSTCs generally do it? I'm leaning towards manipulating the duty cycle, probably with external circuitry.

Thanks for the info, it clears up a few questions.
Re: First SSTC design - Need some critique
Dr. Dark Current, Sat Jul 26 2014, 10:29PM

Three words: Die temperature ripple.

Calculate the peak power dissipation in your transistors and then from the transient thermal impedance graph find out the longest ON-time you can run. The ripple should never be larger than 30 °C.
When running higher duty cycles, also check the average dissipation.

In other words, you can destroy the bridge running at 1% duty in one case, where it will run happily at 10% in another case.
Besides peak current; lower break rates, higher switching frequencies and hard switching all limit the duty cycle you can run.
Re: First SSTC design - Need some critique
DerStrom8, Sun Jul 27 2014, 12:04AM

Dr. Dark Current wrote ...

Three words: Die temperature ripple.

Calculate the peak power dissipation in your transistors and then from the transient thermal impedance graph find out the longest ON-time you can run. The ripple should never be larger than 30 °C.
When running higher duty cycles, also check the average dissipation.

In other words, you can destroy the bridge running at 1% duty in one case, where it will run happily at 10% in another case.
Besides peak current; lower break rates, higher switching frequencies and hard switching all limit the duty cycle you can run.

This is very helpful, but I want to make sure I'm doing this right.

I'm calculating power by the following:

Tj = 150C
Tc = 27C (estimated)
Rth = 0.43C/W

P = (Tj-Tc)/(Rth) = 286W

First of all, does this sound normal? 286W seems quite high, especially for a TO-247. Here's the datasheet I'm looking at: Link2

Then, if I understood you correctly, I use the transient thermal response graph to find the pulse duration from the thermal resistance? In which case, I'm finding it to be around 2mS (thermal resistance is 0.43 degrees C per Watt).

Just checking my work here. This is my first time working with IGBTs in an actual project.

Thanks,
Matt
Re: First SSTC design - Need some critique
Hydron, Sun Jul 27 2014, 12:40AM

You're not going to be able to keep the case anywhere near 27C in steady state at 286W, unless it's outside in the arctic or something. Bump it up a bit and the max dissipation will get much more sane. That said, I've seen far higher numbers in TO-247 datasheets - look up the one for FGH60N60SMD.

As was stated before, the steady state temperature is often not the limiting factor, especially with pulsed operation. While you could spike the die temperature up to 150C briefly without killing it, try doing it too many times and you'll snap the bond wires or something with fatigue from the thermal cycling. Die temperature ripple must be a few 10s of degrees C max - some of Steve Ward's posts talk about this and the number to aim for.
Re: First SSTC design - Need some critique
DerStrom8, Sun Jul 27 2014, 12:54AM

Hydron wrote ...

You're not going to be able to keep the case anywhere near 27C in steady state at 286W, unless it's outside in the arctic or something. Bump it up a bit and the max dissipation will get much more sane. That said, I've seen far higher numbers in TO-247 datasheets - look up the one for FGH60N60SMD.

As was stated before, the steady state temperature is often not the limiting factor, especially with pulsed operation. While you could spike the die temperature up to 150C briefly without killing it, try doing it too many times and you'll snap the bond wires or something with fatigue from the thermal cycling. Die temperature ripple must be a few 10s of degrees C max - some of Steve Ward's posts talk about this and the number to aim for.


Woops! I forgot I was switching around the temperatures to see how the values changed. Originally I had 70C plugged in, which gave me 186W.

The heat sink, in case I haven't mentioned it yet, is this one: Link2

To give you a feel for the size, each floorboard is about 2" wide, if I remember correctly. I'm hoping I'll be able to dissipate a fair amount of heat by using this heat sink and a push-pull PC fan setup on either end for air cooling.

I forgot to ask in my last post how to calculate the temperature ripple. Dr Dark Current mentioned that in his post but I guess I'm unclear as to how to determine the ripple from there.

Cheers,
Matt
Re: First SSTC design - Need some critique
Sigurthr, Sun Jul 27 2014, 06:36AM

Thermal aspects aside; either you hard code the arduino with on time limiting (a defined pulse sequence) or you use a retriggerable one-shot to do the actual pulses and use the arduino for the trigger pulses, thus the duty cycle of the arduino output is irrelevant. You cannot use the built in PWM or tone output functions of the arduino.

for example:
void Pulse1KHz(){  // 1KHz @ 10% duty - note the 100uS on time.
    digitalWrite(3, HIGH);
    delayMicroseconds (100);
    digitalWrite(3, LOW);
    delayMicroseconds (900);
}

void Pulse500Hz(){ // 500Hz @ 5% duty cycle - note the 100uS on time.
    digitalWrite(3, HIGH);
    delayMicroseconds (100);
    digitalWrite(3, LOW);
    delayMicroseconds (1900);
}
*note; precise timing using delay is not guaranteed. One often has to use a clever If Micros() loop where a set number of uS has to have passed since Micros() was saved to a variable in order to do the timing. The above subroutine is just for getting the idea across.

The loop can be implemented similarly to:
void loop (){
    currentMillis = millis();
    digitalWrite(3, HIGH);
    if (currentMillis - previousMillis >= OnTime) {
        previousMillis = currentMillis;
        digitalWrite(3, LOW);
        delayMicroseconds (OffTime); // since offtime is much longer timing isn't an issue
    }
}
*note; preceding code is untested and I'm tired. Again, it's just to illustrate a point.
Re: First SSTC design - Need some critique
Dr. Dark Current, Sun Jul 27 2014, 07:22AM

The DRSSTC transistor power loss calculation goes as follows:

1. Peak conduction loss. Look at the output characteristcs graph and read out saturation voltage for a current somewhat lower than your peak current (lets say ~70% Ipk). Calculate the peak dissipation in one transistor as Ipk * Vsat / pi.

2. Peak switching loss. You need to determine your switching timing. If you use some form of delay compensation ("phase lead" or PLL), you tune it slightly to the inductive side, so calculate with a TURN-OFF current of lets say 20% your Ipk. If the feedback is just direct amplification, you will need to calculate with a TURN-ON current which is relatively large and depends hugely on other factors. It could be in the range of maybe 20-80% of your Ipk. Higher frequencies and slower feedback makes it worse.
Then you read out in the switching energy loss graph (for high Tj) your switching loss and multiply by frequency.

Total peak power loss = peak conduction loss + peak switching loss
Re: First SSTC design - Need some critique
DerStrom8, Sat Aug 02 2014, 05:30PM

Got another question for you guys--

I have become doubtful that my 20nF 5kV tank capacitor will be enough--20nF is awfully low, and I would prefer to have a capacitance of closer to 100nF or higher. I've been thinking about just blowing past my budget by around $70 and buy some 942C-series capacitors from EasternVoltageResearch: Link2
I have also considered picking up 20 of these: Link2
I really didn't want to spend too much money on this project, but I feel I really shouldn't cut corners with the capacitors--besides the IGBTs, I'm thinking they're one of the most important parts.
What are your thoughts on the above options?

By the way, I have been re-considering using my design, as it is unable to ensure soft-switching of the IGBTs and there are a variety of other things that concern me. I think I'll probably end up going with Steve Ward's DRSSTC-1 design, as shown here: Link2

EDIT: I just purchased 8 of these: Link2

Really hoping I didn't spend $30 for caps that won't work. I'm a bit concerned about the Irms. Based on the following formula:

3add0ab352a43691cf6576d58491261b

I calculate my coil, at 220 bps with a 1mS on-time, will have an Irms of 16.91A, but the caps are only rated for 10.1A according to the DS. I misread it when I was looking up the part number, which is why I bought these capacitors--I thought they would work. I may have to resell them and buy some better, 942C- ones.

Peak current of these caps is 216A, I calculate my ipk to be around 35A, but if I am not mistaken it is the Irms that I really need to worry about. Any suggestions?
Re: First SSTC design - Need some critique
loneoceans, Tue Aug 05 2014, 01:18AM

I see you're now trying to sell your 940C caps and buy 942C caps instead in the buy-sell - I'd recommend just sticking with the 940C which also work well. And at this point I think the driver design and geometry are more crucial.

I'm not sure where your 1ms drive time comes from. I think you might be still confusing DRSSTC with SSTC operation. In DRSSTCs, you'll only usually run your drive for a few cycles, around 5 to 15 cycles or so. So if your coil is operating at 100kHz, that's an ON time of 100us for 10 cycles. Your coil is running at 240khz so the ON time will probably be even shorter. Therefore if you use your tone library for DRSSTC drive, using your example, you'll drive your coil for 1.14ms, and in DR mode this will probably lead to some magic silicon smoke being released somewhere neutral

While it is nice to have quick connect transistor slots, the current way you're doing looks really lossy. You can find those green connectors with direct leads at the bottom which you can solder, which will be much better than the stacked way you have.

Finally, your primary inductance looks really high at 28uH. I think this might because you're using a really small 20nF tank capacitor so you need a primary with lots of turns to get your freq up to 200kHz. If you keep the same frequency and increase to 100nF as you mentioned, your inductance has to drop by 5 to keep the same frequency, and your ipk will increase by 5 times assuming the same drive duration. amazed

[Edit] I just saw that your original design used 10 turns of primary in a cylindrical form. This will result in far too high coupling between your primary and secondary, and will lead to flashovers in DRSSTC operation. With your 8 caps, you can start off with two strings of 4 which will give you 75nF which should be a good starting point for your coil. You can go for a flat primary, or even a cylindrical one with a larger diameter and fewer turns. It might also be better to start off with a simple 555 timer for your interrupter which will be one less thing to worry about and to debug :)


Re: First SSTC design - Need some critique
DerStrom8, Tue Aug 05 2014, 02:26AM

loneoceans wrote ...

I see you're now trying to sell your 940C caps and buy 942C caps instead in the buy-sell - I'd recommend just sticking with the 940C which also work well. And at this point I think the driver design and geometry are more crucial.

I'm not sure where your 1ms drive time comes from. I think you might be still confusing DRSSTC with SSTC operation. In DRSSTCs, you'll only usually run your drive for a few cycles, around 5 to 15 cycles or so. So if your coil is operating at 100kHz, that's an ON time of 100us for 10 cycles. Your coil is running at 240khz so the ON time will probably be even shorter. Therefore if you use your tone library for DRSSTC drive, using your example, you'll drive your coil for 1.14ms, and in DR mode this will probably lead to some magic silicon smoke being released somewhere neutral

While it is nice to have quick connect transistor slots, the current way you're doing looks really lossy. You can find those green connectors with direct leads at the bottom which you can solder, which will be much better than the stacked way you have.

Finally, your primary inductance looks really high at 28uH. I think this might because you're using a really small 20nF tank capacitor so you need a primary with lots of turns to get your freq up to 200kHz. If you keep the same frequency and increase to 100nF as you mentioned, your inductance has to drop by 5 to keep the same frequency, and your ipk will increase by 5 times assuming the same drive duration. amazed

[Edit] I just saw that your original design used 10 turns of primary in a cylindrical form. This will result in far too high coupling between your primary and secondary, and will lead to flashovers in DRSSTC operation. With your 8 caps, you can start off with two strings of 4 which will give you 75nF which should be a good starting point for your coil. You can go for a flat primary, or even a cylindrical one with a larger diameter and fewer turns. It might also be better to start off with a simple 555 timer for your interrupter which will be one less thing to worry about and to debug :)




Hi loneoceans,

Okay, I will hold on to the 940C caps for a while and see how they work.

The 1mS comes from a (possibly incorrect) calculation of 2mS maximum on-time before the IGBTs start to suffer, so I decided 1mS was a way to stay safe. I have since considered using a 555 timer wired in monostable mode to deliver consistent 250uS pulses, which should allow a maximum frequency of 2kHz from the interrupter at 50% duty cycle. From there, the duty cycle would decrease (the on-time would remain the same). Not quite sure if I"m on the right track here, but it's what I've been thinking about lately.

Using JavaTC I designed the cylindrical primary to have a coupling coefficient of 0.131k. I was thinking that was a good value....?

The IGBT connectors won't be permanent. I'm not sure if I posted the latest version yet either--I shortened the leads significantly, so that they're just spacers now: Link2

But you're right, I will definitely be looking for better options.

I had a feeling a 20nF capacitor was awfully small, which is why I bought the 940Cs. I re-did some designs on the fly one time and got some more reasonable values, but unfortunately I didn't save them. When I bought the new caps, though, I knew I would have to re-design the whole thing. I have been wondering if I should try to lower the frequency of the coil by increasing the topload capacitance, but someone also mentioned that this might load the coil too much and cause arcing directly from the side of the secondary.

I also need to be careful about how much current I allow through the IGBTs and the capacitors, so I'll need to be careful about the primary inductance.

And you're right, I definitely need to start off with a 555 timer interrupter. Then I can move on to the Arduino/MIDI controller. I really need to break this down more into smaller steps :D

Thanks!
Matt

Re: First SSTC design - Need some critique
DerStrom8, Wed Aug 13 2014, 06:41PM

Hi guys,

I've made some progress in a few areas. First of all, the interrupter using the Arduino. I ended up using the TimerOne library and Bresenham accumulators to generate a note with a specified on-time. Here's a waveform of the Arduino emitting a 440Hz (A4) note.


I also have a question about mounting the bridge to the heat sink. Which would you guys recommend: Putting two IGBTs on either side of the large heat sink, or put all four on one side (it's a big heat sink) to reduce lead length? I'm thinking the lead length isn't terribly important between the GDT and the gates of the IGBTs, to an extent. Am I correct? In which case, I should probably mount two IGBTs on either side....?

Now that I have a nice modern scope (cheap, but it works), I'll be able to continue with the actual build.

Thanks for the help,
Matt
1407955317 3704 FT164145 Newfile0
Re: First SSTC design - Need some critique
Sigurthr, Wed Aug 13 2014, 08:33PM

Those bursts (pulses) look WAY too long. I can't magnify the image right now but does that say 500uS!?

Keep the secondary side leads of the GDT as short as you possibly can. That is where you'll get terrible parasitic oscillation of the gates. Primary side isn't nearly as critical.
Re: First SSTC design - Need some critique
DerStrom8, Wed Aug 13 2014, 08:47PM

Sigurthr wrote ...

Those bursts (pulses) look WAY too long. I can't magnify the image right now but does that say 500uS!?

Keep the secondary side leads of the GDT as short as you possibly can. That is where you'll get terrible parasitic oscillation of the gates. Primary side isn't nearly as critical.

Yes, that does say 500uS but the timing is adjustable. I will be changing it to 50uS in the code. I kept it at 500uS so that it would be easier to see in the image.

So for the Bridge, I guess that means I should put all of the IGBTs on one side of the heat sink then. That's good to know! Also, would connecting the GDT to the gates with traces on the board be better than connecting with wires? I will be using twisted pairs wherever possible, so hopefully that will help, but I'll keep them as short as possible.

Thanks,
Matt
Re: First SSTC design - Need some critique
DerStrom8, Fri Aug 15 2014, 09:06PM

Hi all,

Just another update:

I have decided to use 1/4" copper tubing for the primary coil (which, based on your suggestions, I have decided to make flat), and the 75nF, 12kV arrangement for the MMC that loneoceans suggested. Here is the input and output of JavaTC:

Input: Link2
Output: Link2

The primary, secondary, and topload are all finished, including an old fuse holder for a tap--

Coils: Link2
Tap: Link2

(Please excuse the mess--I'm in the process of reorganizing)

I also started working on my inverter board and mounting it to the heat sink. Pics will come eventually.

My main question this time around is if you folks could take a look at this updated schematic. Is there anything clearly wrong with it that needs immediate fixing? Or does it look ok? The main difference between this one and my last schematic is the addition of the J-K flip-flop for soft-switching the IGBTs. I based that part of the circuit on Steve Ward's DRSSTC-1 schematic.

Updated schematic: Link2

Finally, regarding the inverter capacitors--What is the recommended value? I've seen snubbers used (small, maybe 1uF or less), and I've seen large ones (1000uF or greater). I expect the larger ones are for smoothing? Or do they serve another purpose (decoupling, perhaps)? I'm using a full-bridge design, so I'm not talking about the capacitors used in half-bridges. Any recommendations would be greatly appreciated!

Also, I mentioned it in my previous post but never really asked, does a 50uS on-time sound more reasonable than 500uS for the interrupter? I know that, according to JavaTC, it will take approximately 17.7uS for the energy to completely transfer from the primary to the secondary.

Thanks again for your help, guys. I think things are really coming along now.

Regards,
Matt
Re: First SSTC design - Need some critique
Sigurthr, Sat Aug 16 2014, 02:08AM

Use twisted wires for any length you can, you can't (easily) twist traces.

Yeah, 50uS sounds better. I wrote a calculator for determining maximum safe OnTime for DRSSTCs, so plug your data into that to get a better idea. OnTime limit is related to current limit and MMC voltage rating.

The beefy caps are for smoothing, so that bursts that occur when the mains voltage is low aren't less powerful. Snubber sized caps are for snubbing!
Re: First SSTC design - Need some critique
DerStrom8, Sat Aug 16 2014, 02:19AM

Sigurthr wrote ...

Use twisted wires for any length you can, you can't (easily) twist traces.

Yeah, 50uS sounds better. I wrote a calculator for determining maximum safe OnTime for DRSSTCs, so plug your data into that to get a better idea. OnTime limit is related to current limit and MMC voltage rating.

The beefy caps are for smoothing, so that bursts that occur when the mains voltage is low aren't less powerful. Snubber sized caps are for snubbing!

I have been using your calculator, and once again I'd like to congratulate you on it--it has been very helpful!

Using your calculator though, I'm still a bit confused about the derating of the capacitors. My MMC is rated for 12kV, so I've been setting it to 0%, but I'm not sure if that's what I should be setting it to. Anyway, that gives me a burst length of less than 70uS (which is how I came up with the 50uS figure). With 30% deration it gives me 48uS.

Thanks for verifying the capacitor bit. That's what I was assuming--there are often smoothing caps and snubber caps, but I think I'm going to skip the snubbers for now. Other than needing to withstand several hundred volts, though, is there anything else I should keep in mind for the smoothing caps? Or does that work the same way as standard smoothing caps after a bridge rectifier? I ask because a lot of things seem to work differently when connected to a DRSSTC :p

So the schematic looks good? I'm starting to set up the board, so I'll want to verify that the circuit is right before actually putting it together.

Thanks!
Matt
Re: First SSTC design - Need some critique
Sigurthr, Sat Aug 16 2014, 04:59AM

Thanks, glad you like it. I like to leave about 100V/cap overhead minimum for QUALITY HV caps, if you are using noname chinese stuff you might want to derate them by as much as 40% (lots of cheap "20kV" caps on ebay that are NOT able to withstand 20kV!).

I didnt check your schematic as I haven't used that flipflop, so I'll let someone else weigh in.

Keep all connections between the filter caps and the IGBTs as short as possible. In one of my early KW-class SSTCs I used 6" leads between bridge and caps and it caused a 30% loss of power.
Re: First SSTC design - Need some critique
DerStrom8, Sat Aug 16 2014, 02:47PM

Sigurthr wrote ...

Thanks, glad you like it. I like to leave about 100V/cap overhead minimum for QUALITY HV caps, if you are using noname chinese stuff you might want to derate them by as much as 40% (lots of cheap "20kV" caps on ebay that are NOT able to withstand 20kV!).

I didnt check your schematic as I haven't used that flipflop, so I'll let someone else weigh in.

Keep all connections between the filter caps and the IGBTs as short as possible. In one of my early KW-class SSTCs I used 6" leads between bridge and caps and it caused a 30% loss of power.


Thanks for the help Sigurthr. I am using 940C30s for my MMC, so I'm thinking they should work ok. If not, I'll go ahead and buy some 942Cs like I had originally planned (they're rated for higher pulse currents).

For the smoothing caps, I generally see huge ones used across the bridge, even on full-bridge designs. Would there be a disadvantage if I used several smaller ones (For example, from an ATX PSU) strung together, provided they can withstand the voltage and have a high enough capacitance to lessen the ripple? Just curious if this is another thing that really needs a lot of thought put into it.

Thanks,
Matt
Re: First SSTC design - Need some critique
Matt Edwards, Sat Aug 16 2014, 10:17PM

RIFA or UPE is a great choice if you can find them cheap enough. Everyone i know generally uses them for the larger coils.
Re: First SSTC design - Need some critique
DerStrom8, Sun Aug 17 2014, 12:49AM

Matt Edwards wrote ...

RIFA or UPE is a great choice if you can find them cheap enough. Everyone i know generally uses them for the larger coils.

Thanks Matt, That's very helpful!

Anyone else have more thoughts regarding the schematic? At someone's recommendation I have re-done the feedback circuit and added OCD based on Steve Ward's DRSSTC-1 with OCD. I also added a second Schmitt trigger inverter. I know this will cause more delay, but I believe it's necessary, otherwise the signal would be inverted when it shouldn't be. Here's the updated schematic: Link2

By the way, has anyone used CM300s for higher frequency (~200kHz) coils? Or would you recommend different IGBTs for that? I want to have a plan B in case my 20N60s aren't up to the task.

Thanks folks.
Regards,
Matt
Re: First SSTC design - Need some critique
dexter, Mon Aug 18 2014, 06:24AM

about the schematic.... from Steve Guide to DRSSTC Design in order to make the J-K to work properly the timing of the RC must be carefully chosen/calculated based on your coil frequency
Read this Link2

i'd say build this section of the circuit on a breadboard feed in the interrupter and feedback signals scope the output and tweak the RC value until it is working how it should be working
Re: First SSTC design - Need some critique
zzz_julian_zzz, Mon Aug 18 2014, 08:24AM

I've tried CM300s (600v) @ 190 kHz small coil, it worked, but heating is an issue, however, Phase lead compensator solved that issue. But i would recommend shifting to faster IGBT especially if you're not planning to play with "that" current level about 500 - 600 Amps or so.

Plus, 1 inverter on the input can still make the coil work, you just have to change the phasing of your primary by exchanging the CT secondary feeding your 74hc04. Lastly, you could use 74hc14 instead of 74hc04 so you can eliminate 1 IC and save space. thanks, hope this helps
Re: First SSTC design - Need some critique
DerStrom8, Mon Aug 18 2014, 01:22PM

Thanks guys, excellent points!

@Dexter, good catch on the RC values. I've been to Steve's page several times but somehow missed that point about the R and C values. My coil will be operating at around 212kHz. Therefore, if I stick with the 1nF capacitor, I'll need around 7045 ohms. Thinking I might just use 6.8k. I've updated the schematic to reflect this. Thanks again for pointing that out! Right on about the prototyping on a breadboard. I already have half the circuit set up.

@zzz_julian_zzz thanks for the info regarding the CM300s. I didn't bother with phase lead on this particular design because the IGBTs I currently have, while small, are reasonably fast. If I end up using brick type IGBTs though, I'm sure I'll have to look into phase lead a bit further. I've seen some designs that simply use an inductor and a resistor in series, placed across the secondary of the feedback CT. Is it really that simple? As for your note about the 7404 vs. 7414, that's a great idea. I'm not sure why I chose the '04 in the schematic, because originally I was going to use the '14 for everything.

I have applied the recommended changes, so here's the current schematic: Link2

I'll see about doing some more breadboarding and testing today. Unfortunately I need to wait for the function generator I ordered to arrive (I only have vintage tube-type ones that only go up to around 100kHz and are horribly inaccurate). I'll post back when I've done some testing.

Thanks again,
Matt
Re: First SSTC design - Need some critique
DerStrom8, Sat Aug 23 2014, 04:33PM

Hi guys,

I've made a few more changes to my setup. After some discussion with other experienced DR builders, I have added a second topload which is removable in case it does cause too much loading on the secondary. My main reason for adding a second topload was to bring down the resonant frequency. 212kHz was quite high for the CM300s that I bought, and the second topload brings my Fres down to around 185kHz. With the added phase lead adjust this should be easier on the IGBTs.

I also re-wound my GDT to avoid excessive leakage inductance. Instead of winding the coils individually, I'm just using Steve's method of wrapping the entire CAT5 cable around and paralleling all of the striped conductors to use as the primary: Link2

I fed a ~200kHz square wave into the primary to see how the secondary waveform compared, and it's pretty darn close. The yellow trace is the primary, blue is the secondary: Link2
The droop is due to the 50-ohm output from my function generator, and is not a fault of the transformer construction.

Finally, I connected my GDT to the output of the UCC27425 pair, left the enable pins high, and fed in a ~185kHz signal to simulate feedback into the input pins. The secondary waveform (unloaded) is seen here: Link2
There's some overshoot and some ringing, but that should be fixable once it's actually connected to my bridge, and I can adjust the damping resistor if necessary.

I've done a rough-fit of my bridge: Link2

I'll be doing some work on the heat sink this afternoon (the IGBTs don't quite fit, I need to grind down some ridges).

Once again, here's the updated schematic: Link2

My question for today: Where might I find the type of connector to fit the Gate/Emitter tabs on the IGBTs? Closest I found were 3/16" straight female spade connectors, but they're a bit large, and I wold prefer right-angle ones. Any recommendations?

Thanks,
Matt
Re: First SSTC design - Need some critique
DerStrom8, Tue Aug 26 2014, 02:35AM

Hi guys,

Not sure if anyone's still watching this thread, but I've completely redesigned my secondary coil due to some limiting factors I ran into (no usable 240v or high-current source, etc). My new coil is 4.5" x 12" with a 4.5" x 15.75" topload, wound with #34 AWG wire. However, according to JavaTC, my total energy transfer time is almost 20uS! Is that normal? Most coils I've seen have a transfer time of <10uS. Also, I can't seem to find the math that determines the transfer time, so I'm not sure what I would need to change. If you guys could point me in the right direction here, it'd really be appreciated!

JavaTC input: Link2
JavaTC output: Link2
Re: First SSTC design - Need some critique
Uspring, Tue Aug 26 2014, 10:55AM

Transfer time is roughly equal to 1/(2*k*f). It's not a very important parameter for DRSSTCs. More interesting is the coupling k, which seems to be about 0.2, which looks ok to me.

Re: First SSTC design - Need some critique
Mads Barnkob, Tue Aug 26 2014, 11:40AM

DerStrom8 wrote ...

My question for today: Where might I find the type of connector to fit the Gate/Emitter tabs on the IGBTs? Closest I found were 3/16" straight female spade connectors, but they're a bit large, and I wold prefer right-angle ones. Any recommendations?

This is the standard size cable shoe that fits a CM300: Link2
Re: First SSTC design - Need some critique
DerStrom8, Sat Sept 13 2014, 04:33PM

Hi all, I know it's been a while since I've posted. I made a lot of progress and several major changes.

First of all, I'll be driving this DR with two paralleled bridges made up of FGH60N60UFD IGBTs instead of the CM300s. The expected operating frequency is around 120kHz with the new secondary. I designed the board layout for the bridges myself:

Top: Link2
Bottom: Link2

My latest schematic is shown here: Link2

I am wiring up the flip-flops/drivers at the moment, and testing it by using my function generator to simulate a 120kHz feedback signal.

EDIT: Question removed because I found the problem