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Registered Member #152
Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
Arcstarter wrote ...
I experience the same thing with my 555 driving irfp460.I get 2 inch sparks at audible frequencies but 1 inch powerful arcs at above audible range. I haven't as much experience as you do but i figure it is because there are so many sparks at a high frequency that they fuse together. And i base this upon the theory of absolutely nothin'.:)
Well, this resonant technology is good for very high powers where you don't want to use expensive high current devices. This is only true when driving highly inductive loads. I was pulling 560 Watts of real power and getting ~8" arcs, and the small TO220 IRF740 transistors were just slightly warm.
Registered Member #89
Joined: Thu Feb 09 2006, 02:40PM
Location: Zadar, Croatia
Posts: 3145
Hi guys,
Been looking at this now for a while, good job Jan! Any pix of the arcs for me?
I actually got this circuit going right, the problem was in the feedback path. Now i use a voltage sense winding on the transformer and use this to switch the transistors on zero crossings. It works well and no "parasitic" oscillations.
The only thing I'd want to improve is that the delay in the fb path causes that the transistors switch a bit too late. Maybe PLL wil help here? I have no experience with it so I have no idea how would I set it up.
Glad to see.. how did you use the feedback transformer? Clamped and directly fed into gate driver inputs? or there is something in between?
How do you start the circuit up?
I've been reading over the articles on parasitic oscillations of paralleled mosfets, but am still pretty puzzled why the problem happens in royer and why is it so bad.
Richie B. pointed out, that in shorted output state, where resonating inductance is low, mosfets in push-pull configuration act very much like they are parallel, and experience parasitic oscillations in same way.
Steve Conner wrote ... I believe the parasitics happen in a single-ended mode. The resonant circuit is between gate and source, and it's powered by feedback through the Miller capacitance. (The same feedback mechanism as Sulaiman observed, just a different resonant mode.)
The transconductance of vertical MOSFETs is extremely high to start with, and increases even more with drain current, so as you crank your variac up, you get more gain, more feedback, until the loop gain exceeds 1 and it bursts into song.
But, if I'm using low impedance gate drivers on each mosfet, how can ever the gate be affected by miller capacitance, yet with zero voltage transitions? Or I'm not getting you correctly?
Am I right, that this parasitic oscillation is happening through the circuit's feedback path itself? The 'feedback diodes' are directly connecting drain of one mosfet to other's gate.
Slow gate pullup resistors would definitely dampen out any fast oscillations, so that explains why they happen with gate drivers and not with the pullup resistors?
If that's true, could one solve the problem by using some sort of ''debounce'' circuit in series with feedback?
I don't understand what you mean about the 'mode' observed by sulaiman, could you guys clarify that a bit?
When I connect just the gate supply without the drain supply, the tank circuit gets powered through pullups and diodes and oscillates at it's resonant frequency, which is expected. I never noticed anything wrong about that?
I'd bet the cure would involve ferrite beads on gate leads, gate stopper resistors, RC snubbers from drain to ground, etc. IGBTs would also suffer less than MOSFETs because they're slower. The original Mazzilli oscillator did in fact use BUP314s (they are 1200V) running off rectified 220V mains, and powered a SSTC with good results.
I don't really understand yet, what exactly do the ferrite beads do?
Is their point to saturate with high gate charging current, but provide high inductance during on/off times?
Plasmaddict wrote ...
The only thing I'd want to improve is that the delay in the fb path causes that the transistors switch a bit too late. Maybe PLL wil help here? I have no experience with it so I have no idea how would I set it up.
As to the 1200V devices - well you can use a current fed halfbridge (that operates with the same principle) and 600V devices can be used at mains 325V voltage.
I'm not sure how would PLL work there - I was thinking, if it fails to lock and VCO is far off, wouldn't the tank circuit represent low impedance and blow the mosfets up?
And even if it could it wouldn't really do anything about the phase shift, as far as I know.
My understanding of PLL is still quite poor.
I hope you 'll design the elusive bridge CF-inverter at some point Jan, have good luck
Registered Member #152
Joined: Sun Feb 12 2006, 03:36PM
Location: Czech Rep.
Posts: 3384
Marko wrote ... Hi guys,
Been looking at this now for a while, good job Jan! Any pix of the arcs for me?
Hi marko, sorry no pics as the arcs were not that spectacular, they were similar to the ones in the "moster arcs from flyback" video which I've posted in "Flyback arc contest" thread. However they were a bit more "flappy" and noisy.
Marko wrote ... Glad to see.. how did you use the feedback transformer? Clamped and directly fed into gate driver inputs? or there is something in between?
How do you start the circuit up?
I used a winding directly on one of the main power xfmrs. This goes into a fast invertor and then to TC4422 gate drivers. Start up is realised by a start-up oscillator.
Marko wrote ... Am I right, that this parasitic oscillation is happening through the circuit's feedback path itself? The 'feedback diodes' are directly connecting drain of one mosfet to other's gate.
This is what it think, that this "diode feedback" design is a little flawed. I can't say how did I come to this conclusion as it is very hard to imagine (and simulating this circuit in your mind cand be a mind-bending experience), but it has something to do with the gate threshold voltage, transconductance of the FETs, gate capacitance, and of course is greatly affected by the pull up resistors.
Marko wrote ... I hope you 'll design the elusive bridge CF-inverter at some point Jan, have good luck
Heh, I've already "designed" it (by this I mean I could draw a working schematic) but there needs to be the little thing solved in the feedback, and that's the delay. Of course it would work as is but the delay introduces more loss on the transistors, especially at high frequencies.
Does anyone have an idea why bigger resonant caps result in thicker but shorter arcs? Why are they shorter if f is lower?
Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
I guess the arcs get longer and thinner with increasing frequency because you're getting closer to the self-resonant frequency of the secondary coils. So on one hand, you get resonant rise like a Tesla coil, boosting the open-circuit output voltage, which makes the arc longer.
On the other hand, as the frequency increases, the inductive reactance of the secondary coils limits the output current more once the arc is struck, making it thinner.
I've also noticed the same effect when playing with a ferrite transformer from an electronic NST, that used to power a neon beer sign. When I tried driving it actually at the secondary's resonant frequency, it flashed over and caught fire within 10 seconds.
Registered Member #543
Joined: Tue Feb 20 2007, 04:26PM
Location: UK
Posts: 4992
Plasmaddict wrote ... Does anyone have an idea why bigger resonant caps result in thicker but shorter arcs? Why are they shorter if f is lower?
When you change the capacitor in the tuned circuit, you are changing the frequency of oscillation. At this new frequency, the impedance of the supply line choke, the Q of the tuned circuit, and the efficiency of the flyback, will all be different.
LOPTs from PAL 625-line TV sets will have been optimized for operation at 15.625kHz so can be expected to do best around this frequency.
Like you, I tried a range of capacitors in the tuned circuit from the 0.68uF specified in the original Mazzilli circuit, through to 4uF.
I measured the LOPT peak output voltage by charging a capacitor through a diode, and observed a range of outputs from ~3kV to ~4kV depending on capacitor size (and therefore fo.) when running the oscillator from a low impedance 15.5V supply.
I used a 275V polycarbonate for the 0.68uF, and 375V motor start capacitors for the 1, 2, 3, and 4uF tried in my experiment.
I used cheap IRL640 MOSFETS in my version, with 300uH for the choke, a value which I increased beyond the original Mazzilli design values because of the lower frequency of my circuit.
Best results (3.95kV pp) were obtained with the 2uF, when the circuit oscillated at 18.6kHz, close to the original LOPT 15.625kHz design frequency. (The highest voltage - 4.1kV - was obtained with a 1uF tank capacitor, but when the output was loaded with a 4-stage CW, it sagged below the level that could be sustained at the lower frequency provided by the 2uF)
I have not tried computer monitor LOPTs, which are optimized to work at much higher frequencies.
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"zvs" flyback driver on mains?
