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Large DRSSTC: choosing secondary impedance

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Kizmo

Mon Apr 28 2014, 10:37AM

Registered Member #599 Joined: Thu Mar 22 2007, 07:40PM
Location: Northern Finland, Rovaniemi
Posts: 624

Intra wrote ...

Kizmo wrote ...

I managed to have quite epic secondary failure last night and now im looking forward of winding new one. With topload the failed secondary was around 70kOhm impedance at resonance. From earlier conversations I recall several coilers stating that somewhat optimal secondary impedance for big coil is less than 50kOhm. Is this still true? Old secondary was 315x1270mm and I think i will make it a little larger for next coiling season.

I had same issue. That's not an impedance problem. It can be a wire's coat. In some cases, if source wire for secondary is old, epoxy coating may crack under the influence of time. Therefore reduced dielectric breakdown strength and produce winding electrical breakdown. Also, common secondary coating may have been not large enough for sufficient dielectric strength.

Im not blaming impedance for my secondary failure. I used premium quality double enameled high temp wire, pretty much best stuff money could buy from local motor winding shop. 22kg reel was like 500euros.

Reason why i started this thread was just to find out if anyone has experimented with different impedance secondaries and got performance gains. I think my next secondary will space wound for added insulation and kind of low impedance, around 35kOhm at unloaded f0.

Steve Conner

Mon Apr 28 2014, 01:11PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

My OLTCs all had >100k Zo and they never quite performed as well as I hoped.

Also, I think I remember Richie Burnett saying that he tried 22k and 50k on his sparkgap coil, and 50k gave much better results. Maybe with more power behind it, the opposite might be true.

For Odin I went for a Zo of about 50k according to the received wisdom, but the stubby secondary and conical primary give a coupling of about 0.225 which is considerably higher than other DRSSTCs I've seen. Got to explore the parameter space a bit more

Uspring

Mon Apr 28 2014, 01:59PM

Registered Member #3988 Joined: Thu Jul 07 2011, 03:25PM
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The equations describe really only a steady state situation and are therefore guidelines only for long burst DRSSTCs. They don't capture the dynamics of OLTCs or similarly SGTCs. Possibly short duration arcs may also have a higher resistance.

The best thing you can do and you've already done that, is to tune primary low and run at the upper pole. That will result in an operating frequency very close to the secondary resonance and consequently reduce Qpri.

Steve Conner

Mon Apr 28 2014, 02:38PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

Interesting!

I've been doing this for years, but I think Steve Ward recently rediscovered it.

It is only possible with a PLL driver, because a feedback driver will always snap to whichever pole has the higher value of Qpri, but a PLL will lock to whichever is closest to the starting frequency.

I've noticed that under some circumstances, the upper pole can disappear completely: the phase doesn't swing through zero any more. Can this be seen as a case of Qpri just getting too low?

Uspring

Mon Apr 28 2014, 03:57PM

Registered Member #3988 Joined: Thu Jul 07 2011, 03:25PM
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At light loads there are 3 ZCS frequencies, the 2 poles and one in the middle. If Qsec drops below 1/k, there is only one left. I'm surprised, that the PLL won't find that. Maybe that is, because there might be a frequency jump from the pole to the left over ZCS frequency.

Steve Conner

Tue Apr 29 2014, 09:07AM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

I think although the phase doesn't swing through zero, there can still be an inflection point in it and the PLL can sometimes get stuck there. Most of the time it seems to work right, but I have seen it sometimes act funny under conditions of heavy streamer loading with the primary detuned very low.

Uspring

Tue Apr 29 2014, 11:01AM

Registered Member #3988 Joined: Thu Jul 07 2011, 03:25PM
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Yes, exactly. Under the conditions you describe, a region of minimum phase shift between primary voltage and current appears, where the minumum is not zero. A PLL will lock onto that.
I've seen a simulation circuit from Steve Ward, where he starts off for a few cycles generated by an external frequency source located at the upper pole. Then he changes over to switching at zero current. In the simulation, that seemed to work and might be more robust wrt to this problem. I dunno, whether he does it this way in his real circuits.

Steve Conner

Tue Apr 29 2014, 12:00PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

I think Steve uses a digital PLL based on a microcontroller now and he seems to be very happy with the performance.

Nowadays I am trying to promote research into FPGA-based driver hardware that would be powerful enough to run any conceivable algorithm. A PLL, a digital simulation of the popular phase lead feedback driver, some combination of the two, or something completely new that nobody has even thought of yet, like an adaptive driver that changes strategy dynamically based on streamer loading.

FPGAs are getting cheaper and more accessible every day, but soldering the !$$**? things to a board is still an issue.

Uspring

Tue Apr 29 2014, 12:29PM

Registered Member #3988 Joined: Thu Jul 07 2011, 03:25PM
Location:
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A smart controller would be nice

I think I made an error in my previous post. A phase shift between primary current and voltage should drive the PLL into the right direction until the phase changes sign. A minimum shouldn't hurt. I'm still mysified.

I wonder about the range of your PLL. Does it have a PI feedback?

Edit: Sorry for getting a bit OT here.

Steve Conner

Tue Apr 29 2014, 12:49PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

Yes, it is a type 2 PLL using an opamp integrator for the loop filter.

There is also a limit on the VCO range and I set this to exclude the lower pole. I guess it's possible that under very heavy streamer loading, the remaining ZCS frequency could be similar to the unloaded lower pole frequency.

To put things in perspective, my PLL driven coil managed a 59" ground strike from a 13" tall resonator.

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