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Registered Member #19
Joined: Thu Feb 02 2006, 03:19PM
Location: Jacksonville, FL
Posts: 168
Thanks for all the help so far, I think I’m beginning to understand how the whole thing works. But I don’t understand what’s happening with my pulse in the gdt. I send it a square wave and out the other end I get a deformed square wave. Just to experiment (and see if I *was* using the wrong type of core) I changed from using a ucc chip to a small npn transistor to drive a small inverter transformer and I get the same type of wave deformation (as before) on a smaller scale. My results were On 10us/div: high duty cycle low duty cycle
The zero reference point for the tl494 output (top wave) is the bottom of third division counting from the top down (about where the wave’s bottom is).
The zero reference point for the transformer output (bottom wave) is the top of the first division (counting from the bottom up).
I noticed that when I was using ucc chips, by just connecting the gdt, the output wave of the ucc chips was deformed before it even reached the gdt. What causes this sort of thing to happen?
Registered Member #89
Joined: Thu Feb 09 2006, 02:40PM
Location: Zadar, Croatia
Posts: 3145
Nick, you didn't listen...
Your waveform is ''deformed'' because you configured the TL494 to do it.
You tied both outputs together and you will never get symetric waveform unless you exactly adjust it, wich isn't very practical and destroys deadtime benefit you would have normally.
I don't know what else to tell you, except I wuld really recommend you to try out steve's design.
It's really a circuit you can hardly get wrong with and all you need to do is replace the TL494 with antenna and one buffer.
Once you get it working I assure you you will get on much easier with everything.
Registered Member #33
Joined: Sat Feb 04 2006, 01:31PM
Location: Norway
Posts: 971
You are not supposed to vary the duty cycle, it should be 50% at all times.
For the third time, you need to connect it like Firkragg said farther up in the thread.
Your frequency is probably way too low, the usual Fres of tabletop SSTC secondaries is around 250-450KHz.
When you use the higher frequency, you can get away with less turns on the GDT, somewhere around 8-12 is usual, depends on many factors, experiment!
When it comes to UCC decoupling, use several caps. A 100nF ceramic and a 1-10µF tantalum very close to each UCC and a 100-1000µF electrolytic cap in common for both of them worked good for me.
For nice gate waveforms, gate resistors are essential.
Registered Member #19
Joined: Thu Feb 02 2006, 03:19PM
Location: Jacksonville, FL
Posts: 168
ok sorry about making you have to repeat it I dunno what’s been running through my mind.. So I separated each output and gave each its own pull down resistor and each its own ucc chip. Now how am I supposed to connect both outputs of the ucc chips? Do I just parallel them? By symmetric I think you mean there needs to be a perfect square wave in the primary in order for the secondary to have a square wave and keep the core from saturating right? I don't understand why it was necessary to separate both outputs. oh and why is it when I put a dc blocking cap on the output the wave drops below zero to about +6, -6 volts? I've seen steves design but I don't have any buffers and it seems a shame to waste all this time working with the tl494 and abandon it.
I think the link to the Plasmasonic schematic will help clear up things. It is a very successful similar design to Richies TL494 setup. Pay attention to the notes in the schematic. Very informative.
Your high duty cycle low duty cycle links are broken.
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gdt problem
