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Registered Member #3395
Joined: Thu Nov 04 2010, 08:42AM
Location: Christchurch, New Zealand
Posts: 193
Hi all,
I will be off to university next year to study electrical engineering, however for the next few months I am still in my home city and I would like to make the most out of my time by designing and building some more HV circuits. My only loss at the moment is I don't have the in depth and technical knowledge to troubleshoot a lot of my experience as I don't yet have an engineering degree, so at the moment I am relying on trial and error elimination and researching on Google, as well as asking questions on this forum. Your advice is always much appreciated :)
So, I want to build a circuit similar to the ZVS ( essentially the same circuit but only with a few modifications). The key differences are - I'm building it to run a triple paralleled output flyback stack, so the input current is greater, I'm expecting it to handle 80-100 amps input. - I'm using 2x paralleled IGBTs (IRG7PH42U, 1200V 90A for 180A current capability at Ta = 25 deg C) in place of each MOSFET in the ZVS circuit - I will use a ferrite bead along on the gates of the IGBTs to eliminate parasitic oscillations - The actual circuit is being built onto two copper clad PCBs (roughly 80mm x 80mm each), which will be placed on top of another with about 5-8mm spacing in between. The conducting tracks on the PCB will have their current carrying capability enhanced by soldering a 2mm thick copper sheet on top of them. - the top board will be devoted to the gate drive section of the circuit (gate resistors, 10k resistors and zener diodes) and the bottom board is devoted to only the collector and emitter pins of the IGBTs.
Pictures are attached below for my rough sketches of the designs for both the gate drive and collector/emitter boards.
Here is my thinking and reasoning for above circuit design proposals: At higher current levels approaching 100A, the current carrying tracks need to be designed to handle higher currents without heating, hence why I'm laying copper sheet on top of the existing copper tracks.
Comparing this proposed ZVS with my current ZVS in terms of current flow, my current ZVS will have 25A flowing at 48V input when arcing. I'm expecting my proposed ZVS to have 100A flowing at around 50-60V input, so if the current is 4x greater, then the energy stored in the inductances of the circuits tracks will be 16x greater using Ep = 1/2 LI^2 (please correct me if wrong).
Due to this higher energy stored in the inductances, does this mean I need to take more care in mitigating potential effects of parasitic oscillations? According to wikipedia, parasitic oscillations occur when the output signal is coupled back into the input signal, either capacitively or inductively. I interpreted this as: higher currents in this circuit will cause greater changes in magnetic flux, greater inductive effect, which is more likely to couple into the gate drive circuit. To quote Dr. Dark Current, "With higher input voltage, higher base current is present which makes the transistors switch faster. This results in sharper transients and the gate drive is more prone to self-oscillation." (, which incited my caution with higher currents.
I intend to use ferrite beads on the gates on the IGBTs to eliminate parasitic oscillations ( - as this site says it's very effective. Should I use a ferrite bead for each IGBT (so 4 of them) or 1 ferrite bead for each pair of paralleled IGBTs (so the paralleled IGBTs share the same ferrite bead. How big a bead should I use and how many turns on the bead?
In the above reasoning, am I wrong anywhere? Are there other physical or electrical issues or phenomena I have missed that I need to account for, which would otherwise adversely affect the operation of this ZVS? Is this worth it, or is the traditional ZVS flyback driver too finicky and unreliable to be scaled up or modified?
Other information for your reference: - All of the 4 IGBTs and 2 boards will be mounted on a tunnel heatsink as the construction base - The circuit has a gate drive PSU separate from the high power PSU that powers the flyback. The gate drive PSU will come from a laptop charger (20V), but both the laptop charger and the high power PSU share a common ground or (-)ve. - the input inductor will be made larger so that it doesn't saturate at the higher currents and the resonant capacitor is also a large MMC.
Registered Member #2292
Joined: Fri Aug 14 2009, 05:33PM
Location: The Wild West AKA Arizona
Posts: 795
Kiwihvguy,
You have given your deigns a great deal of thought, it's oblivious you have been very meticulous. I may not be able to answer all your question but, I will take a stab a giving some advice from my perspective.
First on your IGBTs, let me shed some light on the current rating in the datasheet, it's not obtainable practically. That rating comes from the thermal impedance for the die to case of the package. i.e. if your heatsink external of the package was "perfect" (thermal impedance of 0 C/W to ambient) that current would be the max possible current limited only by the packaging. In real life the external cooling will be imperfect, hence plan from a much lower current than 180A. You can actually use the provided RC thermal network + SPICE to simulate the actual current that you can run. Having the RC thermal network provided in the datasheet is rare and kinda awesome!
Another thing to note is that your IGBTs don't have a co-pack diode. Under perfect ZVS operation this may not be a problem, however in reality this may not be the case. If your IGBT switches slightly late this could spell then end of your IGBT. As current in the primary starts to rise from the previous cycle with no path (because the IGBT is late in turning on) the voltage will rise very high very fast in accordance with V=L*di/dt. You may consider an IGBT with a co-pack diode built in.
Next paralleling IGBTs: Now your datasheet doesn't have a graph from Vce vs temp however most IGBT have a negative temperature coefficient. This means that as they heat up they conduct better (ie Vce drops with higher temp). This little gotcha can bite you if you are paralleling parts, because one of your parts can go into thermal runaway. If one part conducts better than the other it will heat up, making it take more current, which in turn makes it hotter, and so on...
Next your topology. There is nothing nothing wrong with the Mazzilli flyback driver, it's simple and works well doing what it was designed for. However at these power levels I would really recommended moving to a ZVS topology with an actual dedicated gate drive and feedback setup rather than the parasitic gate oscillator used in the Mazzilli circuit. having dedicated feedback and gate drive will improve stability and reliability when driving your IGBTs at such a high power. You shouldn't need ferrite on your gates if using a proper dedicated gate drive.
Registered Member #162
Joined: Mon Feb 13 2006, 10:25AM
Location: United Kingdom
Posts: 3140
Kiwihvguy,
I found the common self-oscillating zvs circuit quite interesting, the topology is current-fed parallel-resonant if you want to research some more. The most important things that I learned;
If the loaded 'Q' of the L//C circuit is below 2.3 it will not work anywhere near zero voltage switching, causing hotter switch transistors. Loaded 'Q' is (VAR in L//C circuit) / (output power), try to keep above 5.
arcing puts a heavy load on the output, enough to temporarily prevent zvs operation, a cfpr is better suited to a known load, e.g. ccfl tube inverter.
Parasitic oscillations occur when the primary capacitor is not electrically VERY close to the drains/collectors.
I too would recommend separate gate drive, more important as supply voltages get higher.
Registered Member #3395
Joined: Thu Nov 04 2010, 08:42AM
Location: Christchurch, New Zealand
Posts: 193
Slightly late reply as I have been busy studying for final exams here and wanted to see if anyone else would reply since. Thanks Goodchild and Sulaiman for your responses, I have both given some thought to your suggestions.
Here are my following queries and points: - CURRENT CAPABILITY: I'm aware current capability of IGBTs decreases with junction temperature and I purposefully decided to parallel them to increase the current carrying capability and I tend to overkill things, which is why even with a predicted current draw of 100A, I added a safety margin of an extra 80A, even if at higher running temperature this might drop to a lower current capability.
- COPACK DIODES: As it was pointed out my IGBTs don't have a co-pack diode, could I use an external one across the collector and emitter, such as BYV26E, MUR1000 or UF4007? I understand you would need a fast recovery diode. The only issue is I already have purchased 5x G7PH42U (1 spare), so preferably it would save cost to implement something suitable externally to compensate if possible, instead of spending $60 on new IGBTs.
- TOPOLOGY AND FULL BRIDGE: I would like to take your advice about a separate gate drive. I was thinking of building a full bridge using the existing IGBTs I have (even if the current capability is now reduced) and running in ZVS mode, using a dedicate gate drive with a gate driver IC. This will be a whole project in itself for me; to learn about, research and design a gate drive for a full bridge. I have started by researching how ZVS works, however in the meantime would you lovely guys be able to suggest or direct me to some resources?
I would be interested in the following: - what driver IC to chose -whether to use gate drive transformer or another H-bridge to increase gate driving power -how to choose the correct components in relation to the intended operation - could I use the IR2453? - websites or resources to learn how to construct a gate driver
Registered Member #2292
Joined: Fri Aug 14 2009, 05:33PM
Location: The Wild West AKA Arizona
Posts: 795
Kiwihvguy wrote ...
Slightly late reply as I have been busy studying for final exams here and wanted to see if anyone else would reply since. Thanks Goodchild and Sulaiman for your responses, I have both given some thought to your suggestions.
Here are my following queries and points: - CURRENT CAPABILITY: I'm aware current capability of IGBTs decreases with junction temperature and I purposefully decided to parallel them to increase the current carrying capability and I tend to overkill things, which is why even with a predicted current draw of 100A, I added a safety margin of an extra 80A, even if at higher running temperature this might drop to a lower current capability.
- COPACK DIODES: As it was pointed out my IGBTs don't have a co-pack diode, could I use an external one across the collector and emitter, such as BYV26E, MUR1000 or UF4007? I understand you would need a fast recovery diode. The only issue is I already have purchased 5x G7PH42U (1 spare), so preferably it would save cost to implement something suitable externally to compensate if possible, instead of spending $60 on new IGBTs.
- TOPOLOGY AND FULL BRIDGE: I would like to take your advice about a separate gate drive. I was thinking of building a full bridge using the existing IGBTs I have (even if the current capability is now reduced) and running in ZVS mode, using a dedicate gate drive with a gate driver IC. This will be a whole project in itself for me; to learn about, research and design a gate drive for a full bridge. I have started by researching how ZVS works, however in the meantime would you lovely guys be able to suggest or direct me to some resources?
I would be interested in the following: - what driver IC to chose -whether to use gate drive transformer or another H-bridge to increase gate driving power -how to choose the correct components in relation to the intended operation - could I use the IR2453? - websites or resources to learn how to construct a gate driver
Regards, kiwihvguy
Holiday slowed me down. Anyway here are my responses to you points.
CURRENT CAPABILITY: Even though you have given it a margin you can still go into thermal runaway. Thermal runaway can be mitigated a little bit by placing all the IGBTs on the same heatsink close together, however it's still could be a real issue even with that 80A margin.
- COPACK DIODES: Yes you can add external co-pack diodes but they should be rated for a similar current rating to that of your IGBT. They should also have a similar reverse recovery time as the IGBT switch times. One addition thing to look for is avalanche rated diodes. This will make your diodes much more robust to over voltage transients during operation.
TOPOLOGY AND FULL BRIDGE: Ok so here is the cool thing about ZVS and full bridges, each side always runs 50% duty cycle. And in order to control power you can shift the phase of each side in relations to one another to control power. This is known as a ZVS phase shifted full bridge.
Misc- There are a couple driver ICs on the market that you could use, Fairchild sells a couple of them. The other option is to roll your own with an MCU or PLD if that sort of thing interest you.
Yes use gate drive transformer! It's simple, reliable, and cheap.
Selecting the correct parts will depend on what you build. SPICE may help.
The IR2453 is just a regular full bridge driver. If you want to use ZVS deadtime will be a major factor in operation. If you would like to just use a regular full bridge then that drive IC will work fine.
Google GDT circuits. There are also a few threads on here that you can search for along with an HVwiki page on the subject.
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Meticulous design of modified ZVS flyback driver - Seeking engineering advice
