Registered Member #29
Joined: Fri Feb 03 2006, 09:00AM
Location: Hasselt, Belgium
Posts: 500
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Hi Matt,
Thanks for the concern.. I'm still around, just a little quiet these days.. 
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-- If drive duty cycle is even just smidgin > 50%, the whole output circuit crashes with no explanation, At 13.56MHz, things do indeed become more difficult. Even around 5MHz,you ned to take some care with layout and connections. Certainly, if the switching duty cycle is >50%, you are likely to get high (possibly destructive) drain currents. Class-E switching is always less than 50% duty cycle...
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-- gatedrive from 9V-11V is fine... as I drive it to 12V-15V, less and less happens on the output until no power flows,
I'm not sure about this one, but it could be a problem with saturation of the gate drive transformer cores. I would need to know more about your gate-drive setup.
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-- device's own output plus forgotten capacitance between the drain tab, e.g. silicone pad, and heatsink sometimes exceeds desirable shunt capacitance; no matter how little extra capacitance you add, it'll always be too much! As a ballpark figure, my particular silicone pads yield about 40pF capacitance between the drain tab and a heatsink.
With careful design of the matching network, you should be able to tune this out. In my opinion, this is a classic impedance matching problem and must be viewed as such. Give me more details and perhaps I can help you out.. (e.g. DC load line of PA transistor, resonator geometry, etc.)
It helps to look at each stage separately. That's why I designed the PLL, amplifier, and resonator as separate system elements. I think it makes things easier to stick together in this case.
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-- triple/quadruple check that resonator is actually being driven at fundamental! Inspecting waveforms whilst driving at harmonics often gives the (wrong) impression that parts of the circuit are working
Again, I would need to know more about your circuit. Also, your 20MHz scope is not likely to show the true waveform very well. However, if you see a stong waveform at 13.56MHz, it is likely that the fundamental resonance is the dominant one.
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-- even a little stray inductance between the shunt capacitor and the switching device can ruin things at high frequencies; I've found it much better to connect the cap to the drain tab, rather than the drain pin or even an inch away on the PCB.
Ahhh! You have discovered part of the black art of RF engineering. KISS! Keep it short stupid!!  Other rules include: always use good ground planes as the earth reference, always decouple all power supplies, no flying leads, use PCB traces backed with a groundplane wherever possible,
component leads as short as possible (surface mount is even better), watch out for inadvertent unwanted feedback by parasitic coupling (use shields around snsitive circuits), everything in a good RF-tight enclosure......
Also, 10kV ceramic caps might be a bit of overkill... Voltage on the primary should never be more than 300-400V or so...
In fact, your board backed with the heat sink looks very neat and clean, as a good RF board should be. The heatsink should be the earth reference (tied to the copper on the back of your PCB).
Perhaps we should move this to another more suitable thread. I am very interested in continuing this discussion given a bit more information about your circuit. We could do some simulations and try to design a proper matching circuit.
Keep up the good work!!!
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5 MHz CW TC with PLL tracking oscillator