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Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
Hi Terry, all
I don't think quenching is that much of a worry to be honest. If the coil is designed right and making big streamers, I think they should eat enough energy that there isn't really much left to quench.
I think part of the robustness of the circuit stems from the fact that it really doesn't try too hard to turn off until all the high frequency nasty stuff is over. Adding a quench circuit could spoil that.
I'm pretty excited about the SISG thing and looking forward to getting the chance to play with one myself. I told my musician friends I don't want to be a rock star unless I get to be a geek too.
Registered Member #89
Joined: Thu Feb 09 2006, 02:40PM
Location: Zadar, Croatia
Posts: 3145
In principle and for a single gap it will definitely work, but I think there could be trouble wih such design using several gaps and a NST or some higher power source.
Doubting you can set all the gaps to guench exactly in same time, first gap wich quenches will have a high voltage appearing on it again (since others are 'late') and firing sidac's again, while SCR is still shorting the IGBT gate they would probably die of overcurrent, since no-one has handled the current for them. IGBT's will probably also die after they get overvolted, or will simply conduct depending on failure mode of sidac's/ SCR..
You could probably get over that by ultra-careful setting of all the timers for very end of notch, but without space for mistakes
I think some kind of sinchronized quenching circuit would be needed for good reliability with lots of seriesed gaps, maybe some kind of external triggering trimer or using one gap as a trigger for others, etc...
I updated the schematic here to something with much more thought:
Update - The zener IS backwards
This is the normal SISG circuit with four parts added. R4 is 2.2k now to allow an ultimate shutdown time (if it screws up) and it maintains the voltage leveling string and current through the sections like before. R6 is 51 ohms now since the gate turn on seems a little slow from testing due to C-E capacitance during the IGBT turn on.
R5 and C2 provide a ramp timer for the SCR. D2 makes it need 12.55 volts before the SCR fires. The higher voltage there makes things much more stable and controlled.
The new parts can be just "tacked" onto an existing SISG for testing. I ordered the SCRs today along with 50 IGBTs
I don't think quenching is that much of a worry to be honest. If the coil is designed right and making big streamers, I think they should eat enough energy that there isn't really much left to quench.
You are probably right It might be more of a "political" thing since everyone seems to "think" it is important. Since conventional gaps quench "sometimes", the SISG sould be able to do it too... Modeling shows it will also reduce IGBT heating by 35% (but who cares).
I think part of the robustness of the circuit stems from the fact that it really doesn't try too hard to turn off until all the high frequency nasty stuff is over. Adding a quench circuit could spoil that.
I don't think this will "break" it. The true test is to turn it off during "maximum" primary energy. Only the OLTC and DRSSTC can do that The IGBT has a peak power of 40kW but that is only 80mJ over 2uS. On the OLTC, one can "feel" the notches as one turns down the dwell control and I have never blown it up... Just have to see what happens.
I'm pretty excited about the SISG thing and looking forward to getting the chance to play with one myself.
I should get that stuff sent to you today
I told my musician friends I don't want to be a rock star unless I get to be a geek too.
Be both!!
Doubting you can set all the gaps to guench exactly in same time, first gap which quenches will have a high voltage appearing on it again (since others are 'late') and firing sidac's again, while SCR is still shorting the IGBT gate they would probably die of overcurrent, since no-one has handled the current for them. IGBT's will probably also die after they get overvolted, or will simply conduct depending on failure mode of sidac's/ SCR..
Good points! I "can" set the timing to a few nS, but it has to be able to withstand any screwed up settings. C2 is a 2% timing cap so the time will vary by at least that for casual adjustments.
One could also put a MOV across the thing if needed but I "think" the SIDACs will protect the IGBT to a point. Adding a few hundred ohm resistor above the SCR might also allow the SIDAC charge circuit to "overide" the SCR in an emergency. The primary energy is low at a notch and an open IGBT destroys the resonant transfer back from the secondary prety well (like the OLTC). But the real test is to set one section to open at the primary energy peak..
Registered Member #477
Joined: Tue Jun 20 2006, 11:51PM
Location: Seattle, WA
Posts: 546
I really want to see the SISG built using a single 6500V brick! So much of the timing voodoo would seem to vanish when you're back to one big fat IGBT. Maybe you can trick somebody into sending you a sample
A local university is letting go of a bunch of old 4160V pole pigs. Not much TC appeal except perhaps for a ridiculous tube coil, or maybe the ridiculous-6500V-IGBT-SISG coil!
I really want to see the SISG built using a single 6500V brick!
But I want to make it easily makable and reproducible. Using odd 'one of a kind' parts is no fun for others. But if you gotem, usem!!
The poly timing caps are 1% now since digikey had them for a tiny price
Maybe one could simply put another IGBT across the SIDACS in the single bottom section for a trigger?? When the voltage is high, drop one section, and they all fire. Maybe send a quick pulse to the existing IGBT gate too....
Putting a resistor in series with the SCR to provide an "overide" function is too slow... Won't work... But I bet the SIDACs could handle it. They have never broke yet... In fact, I have never been "able" to break a SIDAC... They go resistive and say "eak!!", but they don't break... Tesladownunder did not break his either... Might still need a big MOV... But hate the capacitance across the section...
Interesting thought about qenching...
If all the energy is in the secondary, for it to get back to the primary, the primary has to be in tune and of reasonable "Q". If a section or more is open, the "Q" is destroyed and the tuning is probably gone. Thus, little energy gets back to the primary. I wonder if just "one" section being open would quench the whole string of conventional IGBT sections...
This is all "pie in the sky" stuff... The SISG works fine "as is" But fun to think and test things like this to get "more" ideas still
I found a fan that "likes" low voltage like in the MOT application And Mark's IGBT heat sinks are way "cool"!! So prolly screw the losses
Sort of along SISG Timing things... I have not had a chance yet to play with the quench but I have all the parts now This program could easily have the quench stuff added as/if needed...
I made a program to look at the SISG firing timing. With this program, the Gate resistor (100 ohm R5) can be adjusted for faster firing if needed. For my next coil, I am dropping it to 50 ohms so the IGBT kicks in faster. The old value of 100 ohms was a wild guess...
The file is at:
There is a PDF file in the zip with the instructions and source code.
In general, one should try to have the IGBT TakeOver Time twice the Main Capacitor Charge Time. That way the main timing cap is 'sure' to be fully charged before the IGBT takes its charging current away. The Primary TakeOver Current should be less than 100 amps too so the SIDACs don't get too beaten up.
The SIDACs take about 124nS to get going and that time is not significant since no real current flows, so it is ignored. The 24V TVS has a pretty nice overshoot too (28V) that could be set in the input file if you want. In the real world, there will be resonances, propagation times, impedances, Emitter inductance, etc. but the program matches the scope stuff pretty good where it counts.
It might be possible to come up with a resistor value for R5 that would do every situation. Perhaps setting up a little Monty Carlo thing... It is easy to mess with the program to do things like that know. It is just the free LCC C language compiler:
In general, I think having the gate resistor at 50 ohms is fine for most stuff. 100 ohms might be a little too slow and the primary current might get sort of high through the SIDACs.
There are more scope pics at:
if you like scope pics
Cheers,
Terry
Update:
I have updated the SISG Quench circuit here:
From the above, I made R5 a variable little pot now. Prolly could be 50 ohms...
I moved the SCR to the left of R5 too so when it discharges C1 it will not have to heat up R5 to do it. This also makes the quench thing a "two connection" modification that can be discarded in case it sucks
I added a 100 ohm resistor to the top of the SCR now that it is to the left of R5. Now if the SIDACS turn on again, they will "override" the SCR and turn the IGBT back on. This makes it so a SCR turning the gate off will not expose the SIDACs and IGBT to over current/voltage dangers.
I still have not actually made it since time is short... Parts come in tomorrow too since I guess I really don't have all the parts yet...
But I need to report that the SISG quench circuit I proposed appears to be a "disaster"!!
Some circuits work with a little help... But after playing with it all day... The SISG circuit I had proposed seems to "SUCK"!!!
I tried adding caps and resistors and it worked with a bench signal generator and all... But the actual circuit is so nasty is seemed to confuse the SCR not matter what... The SCR just acts like a resistive bowl of mush.. To much AC riding everywhere for that "sensitive gate". Then the AC ride shut it off and all all the time... The dV/dt was fixed with a cap but no...
I just looks terrible... Many odd raw scope pics here...
I can't explain any of them...
So the original SISG works sweet But my quenching circuit idea
Registered Member #89
Joined: Thu Feb 09 2006, 02:40PM
Location: Zadar, Croatia
Posts: 3145
huh. It looks like it's just going to destroy the IGBT, and was that only one gap or a lot of them in series? (it looks like you tested just one)
Only thing I could think off is putting a etc. 100ohm resistor from gate to ground to harden it, but I doubt that'l solve anything. (and yet I wanted to propose an optocoupler-hepled multi-gap quenching idea :p)
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Possible SISG Quench Circuit
Adding a quench circuit could spoil that.
Only the OLTC and DRSSTC can do that 
