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DRSSTC: Importance of soft-switching on interrupter turn-off?

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Dr. Shark

Sun Jun 04 2006, 04:20PM

Registered Member #75 Joined: Thu Feb 09 2006, 09:30AM
Location: Montana, USA
Posts: 711

A lot of people go through a lot of trouble with Flip-Flops etc. to synchronize the interrupter pulses with the RF oscillations in DRSSTCs. I think Dan even caluclated (or measured) that losses would go up about 30% if this is not done. But how important is it really? On one hand, hard-switching 500A at 300V gives up to 150kW power dissipation in the IGBT, so probably it is not very nice. On the other hand, this only occurs once at the end of a cycle and then the IGBT has lots of time to cool down, so it cannot really be so bad.

So, is this something that only makes sense in big, multi-kW coils that really push the limits, or is it a "must have" even in smaller (and less complicated) coils?

...

Sun Jun 04 2006, 04:25PM

Registered Member #56 Joined: Thu Feb 09 2006, 05:02AM
Location: Southern Califorina, USA
Posts: 2445

I seem to remember a discussion about this before, where it was decieded that is was only necessary for the big coils where a single hard switch would blow up the igtb... For the smaller ones it wasn't really necessary.

Marko

Sun Jun 04 2006, 04:30PM

Registered Member #89 Joined: Thu Feb 09 2006, 02:40PM
Location: Zadar, Croatia
Posts: 3145

You can practically build a DRSSTC hooking a 74HC14 to pair of UCC's and interrupting it.
HC14 may even be unnecessary and it would probably work just with an antenna or CT stuck into UCC input (since UCC's generally have schmitt trigger built-in).

You cannot get more simple than that, except royer SSTC or so.

And if you look at steve ward's first DRSSTC and first (base feedback) circuit driving it, and several foot arcs it seems that most of add-ons later are more improvements than necessities, reducing chance ob IGBT failures, less heating, less energy loss in each cycle, shorter cycle, higher peak current in shortewr cycle....

HV Enthusiast

Sun Jun 04 2006, 05:28PM

Registered Member #15 Joined: Thu Feb 02 2006, 01:11PM
Location:
Posts: 3068

wrote ...

A lot of people go through a lot of trouble with Flip-Flops etc. to synchronize the interrupter pulses with the RF oscillations in DRSSTCs. I think Dan even caluclated (or measured) that losses would go up about 30% if this is not done. But how important is it really? On one hand, hard-switching 500A at 300V gives up to 150kW power dissipation in the IGBT, so probably it is not very nice.

The flip-flop synch circuit (many variations of it out there) basically just synchronizes a FAULT turn-off with the end of the present RF pulse. It doesn't really synchronized during normal operation. You can eliminate it completely and still have perfect soft-switching.

The problem, is that if you have a fault condition and wish to turn off the circuit, you may cause an IGBT to hard switch if you turned off mid pulse. This causes an abrupt stop in current which can cause massive voltage spikes across the IGBT killing it. The synchronization circuit merely synchronizes the FAULT pulse with the end of the present RF pulse cause the system to turn off when there is no current flowing through the IGBTs, and therefore no abrupt di/dt which can cause voltage spiking.

During normal operation, the flip-flops really do nothing.

Reaching

Sun Jun 04 2006, 05:39PM

Registered Member #76 Joined: Thu Feb 09 2006, 10:04AM
Location: Hemer, Germany
Posts: 458

yeah dan is right. i already build 6 drsstcs and 2 of them are just a 74hc14,interrupter and ucc driver chips, and they run and run and run, a big one which makes approx 50" sparks and a small one (one of the smallest drsstcs out there) which makes 16" . no problems at all no blown igbts at operation and no blown igbts when power on,off the interrupter.
but the circuit doesnt like ground arcs, it gets slightly out of tune in this moment causing hard switching transitions.
i think you are fine with the simplest circuit for your first drsstcs, for further drsstcs you want something reliable,special,safe etc, then you need to go up with these flip flops ocd circuits etc.

Steve Ward

Sun Jun 04 2006, 07:38PM

Registered Member #146 Joined: Sun Feb 12 2006, 04:21AM
Location: Austin Tx
Posts: 1055

During normal operation, the flip-flops really do nothing.

My circuit synchronizes the turn off for every burst, doesnt matter if there was an overcurrent fault or not. Im not sure exactly what you meant by this, but i think its very important that the shut off is always synchronized.

The reason for this has already been explained, but i will just restate it to get the point across once again. When you interrupt any current, there is a voltage produced given by V=L*di/dt. Di/dt is pretty fast for our IGBTs, so this means that V is proportional to L. The L we are concerned with is the DC buss inductance (that is, the inductance between main filter lytics and IGBTs). Most commercial designs try to get this buss inductance down to 100nH or less if possible. Adding small film caps right next to the IGBTs can help (it can also severely hurt if you set up sympathetic oscillations with this C and buss L!!!) but their use is very limited since they too have some inductance leading to them. So, its best to synchronize the turn off.

Im finding out the hard way that the large CM IGBTs have enough internal inductance that even hard switching 200-300A produces voltage spikes within the IGBT (ie, i can do nothing externally to clamp these spikes) of 1500V or more. In this case im going to have to slow down the gate drive circuit, reducing di/dt.

it seems that most of add-ons later are more improvements than necessities, reducing chance ob IGBT failures, less heating, less energy loss in each cycle, shorter cycle, higher peak current in shortewr cycle....

If you want high performance, my modifications were absolutely necessary, otherwise IGBT failure was far too often to be considered reliable by any definition of the word

.

It seems you can either get pretty lucky with these things and have it work, or you can learn about the fine details involved, build it right, and never have to lose an IGBT (similar to how Steve Conner designed his coil). I was one of those people who got lucky for awhile. Now im looking back at some of my designs and cringing... but its a learning process, and now i know a lot more about these things than i did before. Anyway, after blowing a CM300 a few weeks back (bad TVS string caused the failure) ive been re-examining my design and making major improvements. Hopefully it will never experience a failure again... that is my goal anyway (and that was holding strong for 2 years now). I will update my site once ive actually solved my problem so hopefully people can learn something from it.

HV Enthusiast

Sun Jun 04 2006, 08:51PM

Registered Member #15 Joined: Thu Feb 02 2006, 01:11PM
Location:
Posts: 3068

wrote ...

My circuit synchronizes the turn off for every burst, doesnt matter if there was an overcurrent fault or not. Im not sure exactly what you meant by this, but i think its very important that the shut off is always synchronized.

I was only referring to the synchronization operation within the burst itself, on a pulse-by-pulse basic only. So during normal operation (excluding the falling edge of the interruptor pulse or fault signal), the flip-flops do nothing as far as synchronization goes.

So again i state, with the exception of the last pulse in a burst, the synchronization circuit is not necessary to achieve soft-switching.

Oops. I just read the title, so now i realize the original poster was talking about soft-switching on the last pulse in the burst. Duh!

Steve Conner

Sun Jun 04 2006, 10:12PM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

Hi Steve, all,

That's bad news about the big CM**** bricks

I guess I'll have to be careful with mine.

What I believe about hard switching:

IF your H-bridge layout is carefully done for low stray inductance, and well bypassed
AND you don't exceed the maximum pulsed current rating of the IGBTs you're using

then you can run out of tune and hard switch all you like, without blowing anything. I remember Jimmy Hynes used to drive his DRSSTC with a VCO, and play with the frequency while it was running at full power. Having said that, he did exceed the Icm rating quite a bit. :-/

If you don't meet both the above conditions, then your IGBTs "may or may not" die.

There are two possible failure modes. One is that they overheat due to avalanching from the overvoltage caused by the L*di/dt spikes. This isn't going to happen, realistically, with a single hard switching event at the end of the burst.

The other is that they may go into dynamic latchup when trying to turn off a current greater than the maximum pulse rating. The IGBT latches on like a SCR and blows itself and its opposite number to kingdom come. A single hard switching event could cause this. Slowing the gate drive helps to prevent it. The datasheet will show a value of gate resistance for which the "Turn-off Safe Operating Area" holds.

Steve Ward

Mon Jun 05 2006, 02:42AM

Registered Member #146 Joined: Sun Feb 12 2006, 04:21AM
Location: Austin Tx
Posts: 1055

There are two possible failure modes. One is that they overheat due to avalanching from the overvoltage caused by the L*di/dt spikes. This isn't going to happen, realistically, with a single hard switching event at the end of the burst.

I dont think that *all* IGBT types are avalanche rated (many datasheets make absolutely no mention of it), so wouldnt just a single overvoltage event cause failure of the IGBT? In my case with the CM300s, im very close to soft switching, and now have an extremely low inductance layout, but becuase i switch the gates so quickly, there are large voltage spikes that im pretty sure will kill the IGBTs. If a little bit of static can destroy a silicon junction, then im sure a few mJ of stored energy can too. In my case, the voltage spikes last only 100nS (10mhz oscillatory frequency, given by the internal IGBT case inductance, and the C_E junction capacitance), are you saying that its normal for the IGBTs to deal with these spikes?

Im still trying to find a solution to my problem, but so far ive had no luck. Slowing down the gate drive helps, but it also causes me to increase the current i switch (up to .4XIpk, which is a lot!!) because the delays are longer. So if its normal for an IGBT to just eat up the very short voltage spikes, then my setup is just fine... however, i still worry

. I guess i should just try running it again and see what happens.

Steve Conner

Mon Jun 05 2006, 09:51AM

Registered Member #30 Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706

I debated this a lot with Richie a couple of years back. As far as I know, the only way that overvoltage causes failure is by overheating due to the power dissipation in avalanche mode. The only difference between avalanche rated and non-avalanche rated devices, is that in non-avalanche rated devices, the heating can occur very unevenly over the die, and current hogging can make little patches of the die go into thermal runaway and burn out. So you can kill a big device with relatively little energy. In avalanche rated devices they try to keep those bad effects under control.

AFAIK.

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