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Registered Member #599
Joined: Thu Mar 22 2007, 07:40PM
Location: Northern Finland, Rovaniemi
Posts: 624
Im having troubles with With wards UD2.1b.
Most of the time the driver seems to be performing fine, phase lead works and i get beautiful waveforms. Then as i ramped the interrupter pulse width up and down, sometimes the coil (running without secondary in place at 100bps) went from nice solid bzzz to prptptptptptptptt (sounded like machine gun). I scoped around and found that when this happens, the inverter output was horribly wrong.
This glitch is visible at various places. It shows clearly at UCC gate driver chip inputs before actual P/N fet pairs that drive the GDT. Once coil enters into a glitched mode it usually comes out of it if i alter bus voltage (up or down) or turn phase lead inductor (direction doesnt matter)
I scoped pin 3 of the phase comparator IC and sweeped pulse width up and down. I also stopped and retriggered scope several times so that you can see how it jumps between normal and this glitched mode:
UD2.1 schmatic:
So far i have tried couple values for C33 (220p, 330p and 1n) I have also added 100k resistor in parallel with D1 and D2.
Suggested by mr. Ward i also added 330p between negative input and ground right on the phase comparator but it didnt help.
Coil spec:
105kHz resonant frequency 800nF tank cap SKM150GB128D half bridge 340VDC input 1:33:33 feedback CT OCD not in use
Coil works perfectly with UD1.3
Edit:
The interrupter signal scoped from 74hc stays solid square wave without any obvious issues all the time.
Edit2:
This thing came into my mind last night
Inverter section is done just like this. Could it be that under some conditions Q2 transistor is first one to switch and since there isnt whole lot voltage (ideally nothing) the driver cant get solid feedback and goes this weird operation mode?
Also i cant explain why it works perfectly with older driver. I guess i could try more conventional method of making half bridge (having cap divider) or just slap another igbt there to form a proper h-bridge..
Registered Member #2292
Joined: Fri Aug 14 2009, 05:33PM
Location: The Wild West AKA Arizona
Posts: 795
Oh I know that problem all to well!!
This is an error in the board design with the feedback comparator. The reference divider and the feedback is routed incorrectly, check the schematic vs the board for the TL3116 you will find that error it is obvious once it's pointed out.
Cut a trace or two and add some solder and it should be working just fine.
Registered Member #599
Joined: Thu Mar 22 2007, 07:40PM
Location: Northern Finland, Rovaniemi
Posts: 624
Thanks for help.
I had a good 2 hour session trying to find out whats wrong with this thing.
Things done:
Switched to CM300 full bridge. Now it runs at 60kHz and almost looks like it made the problem even worse.
I traced all caps and resistors in the feedback circuit (even unsoldered bunch of SMD ceramics and measured them!)
Couldnt find misplaced components. I know this board has problem and i fixed it back when i first put this thing together. One trace to cut and one solder jumper. Pin 2 of the TL3116 is sitting nicely at around 1.6Volts so the divider part should be working. Connection between pin 2, R5 and R5 seem to be fine too. Also R26-C33 is connected correctly.
I guess its time to show another video i took:
Upper trace is GDT primary and lower is interrupter signal.
Im totally lost with this one. If i pop in older UD1.3 this circuit runs just fine. Of course there could still be some components misplaced by me but at least i couldnt find any.
EDIT 26.9.2012
Litte bit more work with UD2.1 today.
I made a new feedback CT with 1:500 ratio. Now there is plenty of signal for feedback. Did it help? No.
Interrupter vs primary current right before it goes into RL burden network
Edit 26.9.2012 -2 One more video:
GDT output vs interrupter setting. Is this normal? First without bridge power. You can clearly hear when i put power to the bridge (80VDC).
Im starting to think that this whole thing is cursed :(
Registered Member #1403
Joined: Tue Mar 18 2008, 06:05PM
Location: Denmark, Odense C
Posts: 1968
Bringing thread up to date with posts from:
Goodchild wrote ...
Although this may sounds stupid, do you have the Tl3116 and the LM311 swapped? I only ask because I at one point did this on the UD2.1 and it lead to similar issues to what you were describing.
anyway I'm sorry to hear it's giving you grief... My advice, step through the circuit with a scope and signal gen on the input and check to see where the signal stops being correct.
Lastly your gate signals being in phase sounds to me like you have the phase jumpers set wrong, are both jumpers on the same part of the header?
-------------------
Kizmo wrote ...
You pretty much nailed it. I had indeed those ICs mixed up. Now it works... just like the UD2.1 i had hard time about a year ago!
primary current vs inverter output voltage
You dont need oscilloscope to tell its not really working..
What kind of sorcery is this? Same thing as before, i can drop in UD1.3 and it works perfecly.
-------------------
Goodchild wrote ...
Unlike the UD2.1 the jumper by the inductor set a R or RL burdon network. ie you can disable the pheas lead functionality for debugging. I would try setting the jumper so just the R is in the burdon network and try it again.
From your previose scope shots it looks to me like a possible phase lead issue, maybe the wronge size inductor or somthing along those lines. If this goes away when you switch the network to just R this may be the issue.
-------------------
Kizmo wrote ...
I dont have inductor in place. Same with UD2.1, inductor value didnt have any effect.
-------------------
Goodchild wrote ...
Without the inductor in place you are basically running that feedback input open circuit. Although technically it has a chopper network I have had bad things happen because it was left open.
Humor me on this, put your scope on the output of the TL3116 (pin 7 or 8) and take a scope shot in these three conditions.
First, just how you have it now, no inductor in place.
Second, with the inductor in place.
Third, with the jumper set such that only the R is in the feedback network.
This will also show if the problem you are having is an issue with that first part of the board which 90% time with these phase lead controllers that's usually where it is. Everything after the TL3116 is simple digital stuff and is usually not the issue.
-------------------
Kizmo wrote ...
I think this is somewhat complex problem. I see quite a lot of noise at the output of the phase comparator BUT its difficult to tell if its real or just common mode noise. I have to retest it with my differential probe which has very good common mode noise rejection.
Perhaps next test will be with differential probe and battery power for the driver. Right now there is so much common mode noise from bad switching timing that all it takes is a probe touch to the output of the phase comparator and whole thing will go from sort of working to not working at all.
Strange thing is that i have had this problem with two very different setups. First one was with ultra fast 150A semikron and this one is 24h series cm300 H-bridge. Only thing common with these two builds are builder and most of driver side parts.
-------------------
To this day these boards Kizmo have, do still not work.
Registered Member #1403
Joined: Tue Mar 18 2008, 06:05PM
Location: Denmark, Odense C
Posts: 1968
So far, most of the people that have been in over debugging this with Kizmo, have concluded that it is just weird.
I will not say that I feel lucky, but I managed to replicate this behaviour with my own custom single sided version of the UD2.1.
I still need to change C33 to larger value for running with CM600 bricks. Kizmo tried many values without any luck. Driver is housed in a aluminium enclosure, IEC filter on AC in, ferrite beads around GDT primaries.
Article about the whole DRSSTC construction:
Driver board front: Driver board bottom:
There is a world to difference between the two drivers. But the problem is most likely in the phase lead section. I use a TL3116 equivalent, the MAX913.
The problem is the same as Kizmo describes. As I ramp through the duty cycle, no matter BPS and bus voltage, it will at some points start to jitter and the inverters output voltage looks horrible distorted.
At all times the inverter skips at the maximum primary current, I am not too sure about how this can happen, maybe phase shift of some sort.
When trying to scope the output of the phase lead comparator it becomes very clear that it is unstable. A single touch with the probe on non-inverted output pin 7, the coil can be heard buzzing weirdly, a single touch to inverted output pin 8 and it goes back to run normal. This can be done when its running at one of the points of duty cycle where its normally stable.
Here is a video of me skipping through whole duty cycle range, 0 to 400 uS. Primary current is channel 1, yellow trace, 1div/500A. Inverter voltage is channel 2, blue trace. Bus voltage was 100VDC, scope was not set up correctly for channel 2.
Kizmo would supply me with some pictures tomorrow of the drivers so I can compare, perhaps there is one small thing that is repeated. I hope it will be easier to spot with two so different boards.
Registered Member #30
Joined: Fri Feb 03 2006, 10:52AM
Location: Glasgow, Scotland
Posts: 6706
My personal theory is that the crud coming out of the unstable comparator confuses the flip-flop with runt pulses and causes it to hang up in an undefined state. Or rather, since it only has two possible states, the opposite state to what it needs to be right now. The gate drive gets turned off when it should be on.
The circuit is capable of asserting Pre and Clr at the same time, and data sheets from different flip-flop makers have different explanations about what happens in this case. Most makers say that the state will be determined by whichever input was deasserted last, but TI's datasheet says the state will be undefined. I would be interested to know if the users suffering this problem are using a TI flip-flop.
I was always suspicious of the whole feedback driver concept and preferred to use PLLs.
Registered Member #1403
Joined: Tue Mar 18 2008, 06:05PM
Location: Denmark, Odense C
Posts: 1968
Steve Conner wrote ...
My personal theory is that the crud coming out of the unstable comparator confuses the flip-flop with runt pulses and causes it to hang up in an undefined state. Or rather, since it only has two possible states, the opposite state to what it needs to be right now. The gate drive gets turned off when it should be on.
The circuit is capable of asserting Pre and Clr at the same time, and data sheets from different flip-flop makers have different explanations about what happens in this case. Most makers say that the state will be determined by whichever input was deasserted last, but TI's datasheet says the state will be undefined. I would be interested to know if the users suffering this problem are using a TI flip-flop.
I was always suspicious of the whole feedback driver concept and preferred to use PLLs.
Today I will mod the shit of the comparator to eliminate any noise source, maybe except removing the socket.
I am by coincidence using a Motorola flip-flop on this driver. As you said the datasheet from Motorola also states that if both inputs goes high, the outputs are unpredictable.
Edit of modifications tried:
No effect: Add ferrite bead to V- and V+ for comparator MAX913, as described in datasheet.
No effect: Add 10uF tantalum capacitor in parallel with 0,1uF decoupling capacitor between V- and V+, as described in datasheet.
No effect: Add 33pF from IN+ to GND, found in schematics for a high precision clock using MAX913.
No effect: Add 100K and parallel with 0,1uF from IN- to GND, found in schematics for a high precision clock using MAX913.
No effect: Changed C33 from 220pF to 2,2nF, suggested value by Steve Ward for CM600 bricks.
No effect: Changed Motorola 74HC74 flip-flop for a TI 74HC74
No effect: Run without inductor in place, bridged over for resistive burden only.
No effect: Exchange Slot ten 5-09 inductor (16-42uH) for a open frame inductor (15-59uH)
No effect: Grounded the floating pin 1 on 74HC14, the inverting gate left out due to phasing of opto input
No effect: Added 10K pull-up resistors on MAX913 outputs
A question that still remains unanswered is: Is this really an unstable circuit when the double inverter voltage swing is always on the peak primary current?
Registered Member #2292
Joined: Fri Aug 14 2009, 05:33PM
Location: The Wild West AKA Arizona
Posts: 795
You know Kizmo,
The fact that you have tried so many different boards and so many different fixes kind of indicates to me that it may not be your boards. You know that the UD2 deign works because it has been used successfully by many different people.
At this point I would start to look at factors outside of the board. That's just my two bits.
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Weird intermittent problem with a DRSSTC driver (edit4: fixed?)
Same thing as before, i can drop in UD1.3 and it works perfecly.
